init.c (f52c895a2de8697108c6385e9695061585690dc8) init.c (a48130e92f1c86638295a53d1735dfed7f55a2c4)
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2007-2010 Advanced Micro Devices, Inc.
4 * Author: Joerg Roedel <jroedel@suse.de>
5 * Leo Duran <leo.duran@amd.com>
6 */
7
8#define pr_fmt(fmt) "AMD-Vi: " fmt

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2938 amd_iommu_irq_ops.capability |= (1 << IRQ_POSTING_CAP);
2939 pr_info("Virtual APIC enabled\n");
2940#endif
2941}
2942
2943static void enable_iommus(void)
2944{
2945 early_enable_iommus();
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2007-2010 Advanced Micro Devices, Inc.
4 * Author: Joerg Roedel <jroedel@suse.de>
5 * Leo Duran <leo.duran@amd.com>
6 */
7
8#define pr_fmt(fmt) "AMD-Vi: " fmt

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2938 amd_iommu_irq_ops.capability |= (1 << IRQ_POSTING_CAP);
2939 pr_info("Virtual APIC enabled\n");
2940#endif
2941}
2942
2943static void enable_iommus(void)
2944{
2945 early_enable_iommus();
2946 enable_iommus_vapic();
2947 enable_iommus_v2();
2948}
2949
2950static void disable_iommus(void)
2951{
2952 struct amd_iommu *iommu;
2953
2954 for_each_iommu(iommu)
2955 iommu_disable(iommu);

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3203 int ret = 0;
3204
3205 for_each_iommu(iommu) {
3206 ret = iommu_init_irq(iommu);
3207 if (ret)
3208 goto out;
3209 }
3210
2946}
2947
2948static void disable_iommus(void)
2949{
2950 struct amd_iommu *iommu;
2951
2952 for_each_iommu(iommu)
2953 iommu_disable(iommu);

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3201 int ret = 0;
3202
3203 for_each_iommu(iommu) {
3204 ret = iommu_init_irq(iommu);
3205 if (ret)
3206 goto out;
3207 }
3208
3209 /*
3210 * Interrupt handler is ready to process interrupts. Enable
3211 * PPR and GA log interrupt for all IOMMUs.
3212 */
3213 enable_iommus_vapic();
3214 enable_iommus_v2();
3215
3211out:
3212 return ret;
3213}
3214
3215static bool __init detect_ivrs(void)
3216{
3217 struct acpi_table_header *ivrs_base;
3218 acpi_status status;

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3282 early_enable_iommus();
3283 x86_platform.iommu_shutdown = disable_iommus;
3284 init_state = IOMMU_ENABLED;
3285 break;
3286 case IOMMU_ENABLED:
3287 register_syscore_ops(&amd_iommu_syscore_ops);
3288 ret = amd_iommu_init_pci();
3289 init_state = ret ? IOMMU_INIT_ERROR : IOMMU_PCI_INIT;
3216out:
3217 return ret;
3218}
3219
3220static bool __init detect_ivrs(void)
3221{
3222 struct acpi_table_header *ivrs_base;
3223 acpi_status status;

--- 63 unchanged lines hidden (view full) ---

3287 early_enable_iommus();
3288 x86_platform.iommu_shutdown = disable_iommus;
3289 init_state = IOMMU_ENABLED;
3290 break;
3291 case IOMMU_ENABLED:
3292 register_syscore_ops(&amd_iommu_syscore_ops);
3293 ret = amd_iommu_init_pci();
3294 init_state = ret ? IOMMU_INIT_ERROR : IOMMU_PCI_INIT;
3290 enable_iommus_vapic();
3291 enable_iommus_v2();
3292 break;
3293 case IOMMU_PCI_INIT:
3294 ret = amd_iommu_enable_interrupts();
3295 init_state = ret ? IOMMU_INIT_ERROR : IOMMU_INTERRUPTS_EN;
3296 break;
3297 case IOMMU_INTERRUPTS_EN:
3298 init_state = IOMMU_INITIALIZED;
3299 break;

--- 539 unchanged lines hidden --- 		3295 break;
3296 case IOMMU_PCI_INIT:
3297 ret = amd_iommu_enable_interrupts();
3298 init_state = ret ? IOMMU_INIT_ERROR : IOMMU_INTERRUPTS_EN;
3299 break;
3300 case IOMMU_INTERRUPTS_EN:
3301 init_state = IOMMU_INITIALIZED;
3302 break;

--- 539 unchanged lines hidden ---