main.c (e27014bdb47eb435f78573685f4196c07329f1f7) main.c (d18bb3e15201918b8d07e85a6e010ca5ed28dad5)
1// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
2/*
3 * Copyright (c) 2013-2020, Mellanox Technologies inc. All rights reserved.
4 */
5
6#include <linux/debugfs.h>
7#include <linux/highmem.h>
8#include <linux/module.h>

--- 312 unchanged lines hidden (view full) ---

321
322 mpi->mdev_refcnt--;
323 if (mpi->unaffiliate)
324 complete(&mpi->unref_comp);
325out:
326 spin_unlock(&port->mp.mpi_lock);
327}
328
1// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
2/*
3 * Copyright (c) 2013-2020, Mellanox Technologies inc. All rights reserved.
4 */
5
6#include <linux/debugfs.h>
7#include <linux/highmem.h>
8#include <linux/module.h>

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321
322 mpi->mdev_refcnt--;
323 if (mpi->unaffiliate)
324 complete(&mpi->unref_comp);
325out:
326 spin_unlock(&port->mp.mpi_lock);
327}
328
329static int translate_eth_legacy_proto_oper(u32 eth_proto_oper,
330 u16 *active_speed, u8 *active_width)
329static int translate_eth_legacy_proto_oper(u32 eth_proto_oper, u8 *active_speed,
330 u8 *active_width)
331{
332 switch (eth_proto_oper) {
333 case MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII):
334 case MLX5E_PROT_MASK(MLX5E_1000BASE_KX):
335 case MLX5E_PROT_MASK(MLX5E_100BASE_TX):
336 case MLX5E_PROT_MASK(MLX5E_1000BASE_T):
337 *active_width = IB_WIDTH_1X;
338 *active_speed = IB_SPEED_SDR;

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379 break;
380 default:
381 return -EINVAL;
382 }
383
384 return 0;
385}
386
331{
332 switch (eth_proto_oper) {
333 case MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII):
334 case MLX5E_PROT_MASK(MLX5E_1000BASE_KX):
335 case MLX5E_PROT_MASK(MLX5E_100BASE_TX):
336 case MLX5E_PROT_MASK(MLX5E_1000BASE_T):
337 *active_width = IB_WIDTH_1X;
338 *active_speed = IB_SPEED_SDR;

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379 break;
380 default:
381 return -EINVAL;
382 }
383
384 return 0;
385}
386
387static int translate_eth_ext_proto_oper(u32 eth_proto_oper, u16 *active_speed,
387static int translate_eth_ext_proto_oper(u32 eth_proto_oper, u8 *active_speed,
388 u8 *active_width)
389{
390 switch (eth_proto_oper) {
391 case MLX5E_PROT_MASK(MLX5E_SGMII_100M):
392 case MLX5E_PROT_MASK(MLX5E_1000BASE_X_SGMII):
393 *active_width = IB_WIDTH_1X;
394 *active_speed = IB_SPEED_SDR;
395 break;

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431 break;
432 default:
433 return -EINVAL;
434 }
435
436 return 0;
437}
438
388 u8 *active_width)
389{
390 switch (eth_proto_oper) {
391 case MLX5E_PROT_MASK(MLX5E_SGMII_100M):
392 case MLX5E_PROT_MASK(MLX5E_1000BASE_X_SGMII):
393 *active_width = IB_WIDTH_1X;
394 *active_speed = IB_SPEED_SDR;
395 break;

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431 break;
432 default:
433 return -EINVAL;
434 }
435
436 return 0;
437}
438
439static int translate_eth_proto_oper(u32 eth_proto_oper, u16 *active_speed,
439static int translate_eth_proto_oper(u32 eth_proto_oper, u8 *active_speed,
440 u8 *active_width, bool ext)
441{
442 return ext ?
443 translate_eth_ext_proto_oper(eth_proto_oper, active_speed,
444 active_width) :
445 translate_eth_legacy_proto_oper(eth_proto_oper, active_speed,
446 active_width);
447}

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452 struct mlx5_ib_dev *dev = to_mdev(device);
453 u32 out[MLX5_ST_SZ_DW(ptys_reg)] = {0};
454 struct mlx5_core_dev *mdev;
455 struct net_device *ndev, *upper;
456 enum ib_mtu ndev_ib_mtu;
457 bool put_mdev = true;
458 u16 qkey_viol_cntr;
459 u32 eth_prot_oper;
440 u8 *active_width, bool ext)
441{
442 return ext ?
443 translate_eth_ext_proto_oper(eth_proto_oper, active_speed,
444 active_width) :
445 translate_eth_legacy_proto_oper(eth_proto_oper, active_speed,
446 active_width);
447}

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452 struct mlx5_ib_dev *dev = to_mdev(device);
453 u32 out[MLX5_ST_SZ_DW(ptys_reg)] = {0};
454 struct mlx5_core_dev *mdev;
455 struct net_device *ndev, *upper;
456 enum ib_mtu ndev_ib_mtu;
457 bool put_mdev = true;
458 u16 qkey_viol_cntr;
459 u32 eth_prot_oper;
460 u16 active_speed;
461 u8 mdev_port_num;
462 bool ext;
463 int err;
464
465 mdev = mlx5_ib_get_native_port_mdev(dev, port_num, &mdev_port_num);
466 if (!mdev) {
467 /* This means the port isn't affiliated yet. Get the
468 * info for the master port instead.

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486 if (err)
487 goto out;
488 ext = !!MLX5_GET_ETH_PROTO(ptys_reg, out, true, eth_proto_capability);
489 eth_prot_oper = MLX5_GET_ETH_PROTO(ptys_reg, out, ext, eth_proto_oper);
490
491 props->active_width = IB_WIDTH_4X;
492 props->active_speed = IB_SPEED_QDR;
493
460 u8 mdev_port_num;
461 bool ext;
462 int err;
463
464 mdev = mlx5_ib_get_native_port_mdev(dev, port_num, &mdev_port_num);
465 if (!mdev) {
466 /* This means the port isn't affiliated yet. Get the
467 * info for the master port instead.

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485 if (err)
486 goto out;
487 ext = !!MLX5_GET_ETH_PROTO(ptys_reg, out, true, eth_proto_capability);
488 eth_prot_oper = MLX5_GET_ETH_PROTO(ptys_reg, out, ext, eth_proto_oper);
489
490 props->active_width = IB_WIDTH_4X;
491 props->active_speed = IB_SPEED_QDR;
492
494 translate_eth_proto_oper(eth_prot_oper, &active_speed,
493 translate_eth_proto_oper(eth_prot_oper, &props->active_speed,
495 &props->active_width, ext);
496
494 &props->active_width, ext);
495
497 WARN_ON_ONCE(active_speed & ~0xFF);
498 props->active_speed = (u8)active_speed;
499
500 props->port_cap_flags |= IB_PORT_CM_SUP;
501 props->ip_gids = true;
502
503 props->gid_tbl_len = MLX5_CAP_ROCE(dev->mdev,
504 roce_address_table_size);
505 props->max_mtu = IB_MTU_4096;
506 props->max_msg_sz = 1 << MLX5_CAP_GEN(dev->mdev, log_max_msg);
507 props->pkey_tbl_len = 1;

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1174
1175 if (err)
1176 return err;
1177 }
1178
1179 return 0;
1180}
1181
496 props->port_cap_flags |= IB_PORT_CM_SUP;
497 props->ip_gids = true;
498
499 props->gid_tbl_len = MLX5_CAP_ROCE(dev->mdev,
500 roce_address_table_size);
501 props->max_mtu = IB_MTU_4096;
502 props->max_msg_sz = 1 << MLX5_CAP_GEN(dev->mdev, log_max_msg);
503 props->pkey_tbl_len = 1;

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1170
1171 if (err)
1172 return err;
1173 }
1174
1175 return 0;
1176}
1177
1182static void translate_active_width(struct ib_device *ibdev, u16 active_width,
1183 u8 *ib_width)
1178enum mlx5_ib_width {
1179 MLX5_IB_WIDTH_1X = 1 << 0,
1180 MLX5_IB_WIDTH_2X = 1 << 1,
1181 MLX5_IB_WIDTH_4X = 1 << 2,
1182 MLX5_IB_WIDTH_8X = 1 << 3,
1183 MLX5_IB_WIDTH_12X = 1 << 4
1184};
1185
1186static void translate_active_width(struct ib_device *ibdev, u8 active_width,
1187 u8 *ib_width)
1184{
1185 struct mlx5_ib_dev *dev = to_mdev(ibdev);
1186
1188{
1189 struct mlx5_ib_dev *dev = to_mdev(ibdev);
1190
1187 if (active_width & MLX5_PTYS_WIDTH_1X)
1191 if (active_width & MLX5_IB_WIDTH_1X)
1188 *ib_width = IB_WIDTH_1X;
1192 *ib_width = IB_WIDTH_1X;
1189 else if (active_width & MLX5_PTYS_WIDTH_2X)
1193 else if (active_width & MLX5_IB_WIDTH_2X)
1190 *ib_width = IB_WIDTH_2X;
1194 *ib_width = IB_WIDTH_2X;
1191 else if (active_width & MLX5_PTYS_WIDTH_4X)
1195 else if (active_width & MLX5_IB_WIDTH_4X)
1192 *ib_width = IB_WIDTH_4X;
1196 *ib_width = IB_WIDTH_4X;
1193 else if (active_width & MLX5_PTYS_WIDTH_8X)
1197 else if (active_width & MLX5_IB_WIDTH_8X)
1194 *ib_width = IB_WIDTH_8X;
1198 *ib_width = IB_WIDTH_8X;
1195 else if (active_width & MLX5_PTYS_WIDTH_12X)
1199 else if (active_width & MLX5_IB_WIDTH_12X)
1196 *ib_width = IB_WIDTH_12X;
1197 else {
1198 mlx5_ib_dbg(dev, "Invalid active_width %d, setting width to default value: 4x\n",
1200 *ib_width = IB_WIDTH_12X;
1201 else {
1202 mlx5_ib_dbg(dev, "Invalid active_width %d, setting width to default value: 4x\n",
1199 active_width);
1203 (int)active_width);
1200 *ib_width = IB_WIDTH_4X;
1201 }
1202
1203 return;
1204}
1205
1206static int mlx5_mtu_to_ib_mtu(int mtu)
1207{

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1268 struct ib_port_attr *props)
1269{
1270 struct mlx5_ib_dev *dev = to_mdev(ibdev);
1271 struct mlx5_core_dev *mdev = dev->mdev;
1272 struct mlx5_hca_vport_context *rep;
1273 u16 max_mtu;
1274 u16 oper_mtu;
1275 int err;
1204 *ib_width = IB_WIDTH_4X;
1205 }
1206
1207 return;
1208}
1209
1210static int mlx5_mtu_to_ib_mtu(int mtu)
1211{

--- 60 unchanged lines hidden (view full) ---

1272 struct ib_port_attr *props)
1273{
1274 struct mlx5_ib_dev *dev = to_mdev(ibdev);
1275 struct mlx5_core_dev *mdev = dev->mdev;
1276 struct mlx5_hca_vport_context *rep;
1277 u16 max_mtu;
1278 u16 oper_mtu;
1279 int err;
1276 u16 ib_link_width_oper;
1280 u8 ib_link_width_oper;
1277 u8 vl_hw_cap;
1278
1279 rep = kzalloc(sizeof(*rep), GFP_KERNEL);
1280 if (!rep) {
1281 err = -ENOMEM;
1282 goto out;
1283 }
1284

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1301 props->bad_pkey_cntr = rep->pkey_violation_counter;
1302 props->qkey_viol_cntr = rep->qkey_violation_counter;
1303 props->subnet_timeout = rep->subnet_timeout;
1304 props->init_type_reply = rep->init_type_reply;
1305
1306 if (props->port_cap_flags & IB_PORT_CAP_MASK2_SUP)
1307 props->port_cap_flags2 = rep->cap_mask2;
1308
1281 u8 vl_hw_cap;
1282
1283 rep = kzalloc(sizeof(*rep), GFP_KERNEL);
1284 if (!rep) {
1285 err = -ENOMEM;
1286 goto out;
1287 }
1288

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1305 props->bad_pkey_cntr = rep->pkey_violation_counter;
1306 props->qkey_viol_cntr = rep->qkey_violation_counter;
1307 props->subnet_timeout = rep->subnet_timeout;
1308 props->init_type_reply = rep->init_type_reply;
1309
1310 if (props->port_cap_flags & IB_PORT_CAP_MASK2_SUP)
1311 props->port_cap_flags2 = rep->cap_mask2;
1312
1309 err = mlx5_query_ib_port_oper(mdev, &ib_link_width_oper,
1310 (u16 *)&props->active_speed, port);
1313 err = mlx5_query_port_link_width_oper(mdev, &ib_link_width_oper, port);
1311 if (err)
1312 goto out;
1313
1314 translate_active_width(ibdev, ib_link_width_oper, &props->active_width);
1315
1314 if (err)
1315 goto out;
1316
1317 translate_active_width(ibdev, ib_link_width_oper, &props->active_width);
1318
1319 err = mlx5_query_port_ib_proto_oper(mdev, &props->active_speed, port);
1320 if (err)
1321 goto out;
1322
1316 mlx5_query_port_max_mtu(mdev, &max_mtu, port);
1317
1318 props->max_mtu = mlx5_mtu_to_ib_mtu(max_mtu);
1319
1320 mlx5_query_port_oper_mtu(mdev, &oper_mtu, port);
1321
1322 props->active_mtu = mlx5_mtu_to_ib_mtu(oper_mtu);
1323

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2557 mlx5_cmd_dealloc_pd(to_mdev(ibdev)->mdev, pd->pdn, uid);
2558 return -EFAULT;
2559 }
2560 }
2561
2562 return 0;
2563}
2564
1323 mlx5_query_port_max_mtu(mdev, &max_mtu, port);
1324
1325 props->max_mtu = mlx5_mtu_to_ib_mtu(max_mtu);
1326
1327 mlx5_query_port_oper_mtu(mdev, &oper_mtu, port);
1328
1329 props->active_mtu = mlx5_mtu_to_ib_mtu(oper_mtu);
1330

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2564 mlx5_cmd_dealloc_pd(to_mdev(ibdev)->mdev, pd->pdn, uid);
2565 return -EFAULT;
2566 }
2567 }
2568
2569 return 0;
2570}
2571
2565static void mlx5_ib_dealloc_pd(struct ib_pd *pd, struct ib_udata *udata)
2572static int mlx5_ib_dealloc_pd(struct ib_pd *pd, struct ib_udata *udata)
2566{
2567 struct mlx5_ib_dev *mdev = to_mdev(pd->device);
2568 struct mlx5_ib_pd *mpd = to_mpd(pd);
2569
2573{
2574 struct mlx5_ib_dev *mdev = to_mdev(pd->device);
2575 struct mlx5_ib_pd *mpd = to_mpd(pd);
2576
2570 mlx5_cmd_dealloc_pd(mdev->mdev, mpd->pdn, mpd->uid);
2577 return mlx5_cmd_dealloc_pd(mdev->mdev, mpd->pdn, mpd->uid);
2571}
2572
2573static int mlx5_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
2574{
2575 struct mlx5_ib_dev *dev = to_mdev(ibqp->device);
2576 struct mlx5_ib_qp *mqp = to_mqp(ibqp);
2577 int err;
2578 u16 uid;

--- 1507 unchanged lines hidden (view full) ---

4086 .get_vf_stats = mlx5_ib_get_vf_stats,
4087 .set_vf_guid = mlx5_ib_set_vf_guid,
4088 .set_vf_link_state = mlx5_ib_set_vf_link_state,
4089};
4090
4091static const struct ib_device_ops mlx5_ib_dev_mw_ops = {
4092 .alloc_mw = mlx5_ib_alloc_mw,
4093 .dealloc_mw = mlx5_ib_dealloc_mw,
2578}
2579
2580static int mlx5_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
2581{
2582 struct mlx5_ib_dev *dev = to_mdev(ibqp->device);
2583 struct mlx5_ib_qp *mqp = to_mqp(ibqp);
2584 int err;
2585 u16 uid;

--- 1507 unchanged lines hidden (view full) ---

4093 .get_vf_stats = mlx5_ib_get_vf_stats,
4094 .set_vf_guid = mlx5_ib_set_vf_guid,
4095 .set_vf_link_state = mlx5_ib_set_vf_link_state,
4096};
4097
4098static const struct ib_device_ops mlx5_ib_dev_mw_ops = {
4099 .alloc_mw = mlx5_ib_alloc_mw,
4100 .dealloc_mw = mlx5_ib_dealloc_mw,
4101
4102 INIT_RDMA_OBJ_SIZE(ib_mw, mlx5_ib_mw, ibmw),
4094};
4095
4096static const struct ib_device_ops mlx5_ib_dev_xrc_ops = {
4097 .alloc_xrcd = mlx5_ib_alloc_xrcd,
4098 .dealloc_xrcd = mlx5_ib_dealloc_xrcd,
4099
4100 INIT_RDMA_OBJ_SIZE(ib_xrcd, mlx5_ib_xrcd, ibxrcd),
4101};

--- 797 unchanged lines hidden --- 		4103};
4104
4105static const struct ib_device_ops mlx5_ib_dev_xrc_ops = {
4106 .alloc_xrcd = mlx5_ib_alloc_xrcd,
4107 .dealloc_xrcd = mlx5_ib_dealloc_xrcd,
4108
4109 INIT_RDMA_OBJ_SIZE(ib_xrcd, mlx5_ib_xrcd, ibxrcd),
4110};

--- 797 unchanged lines hidden ---