cq.c (91de76e661a266731fc2889a398ad1694df9d523) cq.c (de57f2ad06d5bf01015b955600cbfc77059b2b6e)
1/*
2 * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:

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119
120static void handle_good_req(struct ib_wc *wc, struct mlx5_cqe64 *cqe,
121 struct mlx5_ib_wq *wq, int idx)
122{
123 wc->wc_flags = 0;
124 switch (be32_to_cpu(cqe->sop_drop_qpn) >> 24) {
125 case MLX5_OPCODE_RDMA_WRITE_IMM:
126 wc->wc_flags |= IB_WC_WITH_IMM;
1/*
2 * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:

--- 110 unchanged lines hidden (view full) ---

119
120static void handle_good_req(struct ib_wc *wc, struct mlx5_cqe64 *cqe,
121 struct mlx5_ib_wq *wq, int idx)
122{
123 wc->wc_flags = 0;
124 switch (be32_to_cpu(cqe->sop_drop_qpn) >> 24) {
125 case MLX5_OPCODE_RDMA_WRITE_IMM:
126 wc->wc_flags |= IB_WC_WITH_IMM;
127 /* fall through */
127 case MLX5_OPCODE_RDMA_WRITE:
128 wc->opcode = IB_WC_RDMA_WRITE;
129 break;
130 case MLX5_OPCODE_SEND_IMM:
131 wc->wc_flags |= IB_WC_WITH_IMM;
128 case MLX5_OPCODE_RDMA_WRITE:
129 wc->opcode = IB_WC_RDMA_WRITE;
130 break;
131 case MLX5_OPCODE_SEND_IMM:
132 wc->wc_flags |= IB_WC_WITH_IMM;
133 /* fall through */
132 case MLX5_OPCODE_SEND:
133 case MLX5_OPCODE_SEND_INVAL:
134 wc->opcode = IB_WC_SEND;
135 break;
136 case MLX5_OPCODE_RDMA_READ:
137 wc->opcode = IB_WC_RDMA_READ;
138 wc->byte_len = be32_to_cpu(cqe->byte_cnt);
139 break;

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797
798 cqc = MLX5_ADDR_OF(create_cq_in, *cqb, cq_context);
799 MLX5_SET(cqc, cqc, log_page_size,
800 page_shift - MLX5_ADAPTER_PAGE_SHIFT);
801
802 *index = to_mucontext(context)->bfregi.sys_pages[0];
803
804 if (ucmd.cqe_comp_en == 1) {
134 case MLX5_OPCODE_SEND:
135 case MLX5_OPCODE_SEND_INVAL:
136 wc->opcode = IB_WC_SEND;
137 break;
138 case MLX5_OPCODE_RDMA_READ:
139 wc->opcode = IB_WC_RDMA_READ;
140 wc->byte_len = be32_to_cpu(cqe->byte_cnt);
141 break;

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799
800 cqc = MLX5_ADDR_OF(create_cq_in, *cqb, cq_context);
801 MLX5_SET(cqc, cqc, log_page_size,
802 page_shift - MLX5_ADAPTER_PAGE_SHIFT);
803
804 *index = to_mucontext(context)->bfregi.sys_pages[0];
805
806 if (ucmd.cqe_comp_en == 1) {
805 if (unlikely((*cqe_size != 64) ||
806 !MLX5_CAP_GEN(dev->mdev, cqe_compression))) {
807 if (!((*cqe_size == 128 &&
808 MLX5_CAP_GEN(dev->mdev, cqe_compression_128)) ||
809 (*cqe_size == 64 &&
810 MLX5_CAP_GEN(dev->mdev, cqe_compression)))) {
807 err = -EOPNOTSUPP;
808 mlx5_ib_warn(dev, "CQE compression is not supported for size %d!\n",
809 *cqe_size);
810 goto err_cqb;
811 }
812
813 if (unlikely(!ucmd.cqe_comp_res_format ||
814 !(ucmd.cqe_comp_res_format <

--- 610 unchanged lines hidden --- 		811 err = -EOPNOTSUPP;
812 mlx5_ib_warn(dev, "CQE compression is not supported for size %d!\n",
813 *cqe_size);
814 goto err_cqb;
815 }
816
817 if (unlikely(!ucmd.cqe_comp_res_format ||
818 !(ucmd.cqe_comp_res_format <

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