main.c (00af6729b52ede86a08173c8d5f2c8cd9fa3390d) main.c (d18bb3e15201918b8d07e85a6e010ca5ed28dad5)
1/*
2 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the

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779 (((u8 *)mailbox->buf)[5] == 0x20 /*56Gb*/) ?
780 IB_WIDTH_4X : IB_WIDTH_1X;
781 props->active_speed = (((u8 *)mailbox->buf)[5] == 0x20 /*56Gb*/) ?
782 IB_SPEED_FDR : IB_SPEED_QDR;
783 props->port_cap_flags = IB_PORT_CM_SUP;
784 props->ip_gids = true;
785 props->gid_tbl_len = mdev->dev->caps.gid_table_len[port];
786 props->max_msg_sz = mdev->dev->caps.max_msg_sz;
1/*
2 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the

--- 770 unchanged lines hidden (view full) ---

779 (((u8 *)mailbox->buf)[5] == 0x20 /*56Gb*/) ?
780 IB_WIDTH_4X : IB_WIDTH_1X;
781 props->active_speed = (((u8 *)mailbox->buf)[5] == 0x20 /*56Gb*/) ?
782 IB_SPEED_FDR : IB_SPEED_QDR;
783 props->port_cap_flags = IB_PORT_CM_SUP;
784 props->ip_gids = true;
785 props->gid_tbl_len = mdev->dev->caps.gid_table_len[port];
786 props->max_msg_sz = mdev->dev->caps.max_msg_sz;
787 if (mdev->dev->caps.pkey_table_len[port])
788 props->pkey_tbl_len = 1;
787 props->pkey_tbl_len = 1;
789 props->max_mtu = IB_MTU_4096;
790 props->max_vl_num = 2;
791 props->state = IB_PORT_DOWN;
792 props->phys_state = state_to_phys_state(props->state);
793 props->active_mtu = IB_MTU_256;
794 spin_lock_bh(&iboe->lock);
795 ndev = iboe->netdevs[port - 1];
796 if (ndev && is_bonded) {

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1210
1211 if (udata && ib_copy_to_udata(udata, &pd->pdn, sizeof(__u32))) {
1212 mlx4_pd_free(to_mdev(ibdev)->dev, pd->pdn);
1213 return -EFAULT;
1214 }
1215 return 0;
1216}
1217
788 props->max_mtu = IB_MTU_4096;
789 props->max_vl_num = 2;
790 props->state = IB_PORT_DOWN;
791 props->phys_state = state_to_phys_state(props->state);
792 props->active_mtu = IB_MTU_256;
793 spin_lock_bh(&iboe->lock);
794 ndev = iboe->netdevs[port - 1];
795 if (ndev && is_bonded) {

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1209
1210 if (udata && ib_copy_to_udata(udata, &pd->pdn, sizeof(__u32))) {
1211 mlx4_pd_free(to_mdev(ibdev)->dev, pd->pdn);
1212 return -EFAULT;
1213 }
1214 return 0;
1215}
1216
1218static void mlx4_ib_dealloc_pd(struct ib_pd *pd, struct ib_udata *udata)
1217static int mlx4_ib_dealloc_pd(struct ib_pd *pd, struct ib_udata *udata)
1219{
1220 mlx4_pd_free(to_mdev(pd->device)->dev, to_mpd(pd)->pdn);
1218{
1219 mlx4_pd_free(to_mdev(pd->device)->dev, to_mpd(pd)->pdn);
1220 return 0;
1221}
1222
1223static int mlx4_ib_alloc_xrcd(struct ib_xrcd *ibxrcd, struct ib_udata *udata)
1224{
1225 struct mlx4_ib_dev *dev = to_mdev(ibxrcd->device);
1226 struct mlx4_ib_xrcd *xrcd = to_mxrcd(ibxrcd);
1227 struct ib_cq_init_attr cq_attr = {};
1228 int err;

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1251
1252err3:
1253 ib_dealloc_pd(xrcd->pd);
1254err2:
1255 mlx4_xrcd_free(dev->dev, xrcd->xrcdn);
1256 return err;
1257}
1258
1221}
1222
1223static int mlx4_ib_alloc_xrcd(struct ib_xrcd *ibxrcd, struct ib_udata *udata)
1224{
1225 struct mlx4_ib_dev *dev = to_mdev(ibxrcd->device);
1226 struct mlx4_ib_xrcd *xrcd = to_mxrcd(ibxrcd);
1227 struct ib_cq_init_attr cq_attr = {};
1228 int err;

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1251
1252err3:
1253 ib_dealloc_pd(xrcd->pd);
1254err2:
1255 mlx4_xrcd_free(dev->dev, xrcd->xrcdn);
1256 return err;
1257}
1258
1259static void mlx4_ib_dealloc_xrcd(struct ib_xrcd *xrcd, struct ib_udata *udata)
1259static int mlx4_ib_dealloc_xrcd(struct ib_xrcd *xrcd, struct ib_udata *udata)
1260{
1261 ib_destroy_cq(to_mxrcd(xrcd)->cq);
1262 ib_dealloc_pd(to_mxrcd(xrcd)->pd);
1263 mlx4_xrcd_free(to_mdev(xrcd->device)->dev, to_mxrcd(xrcd)->xrcdn);
1260{
1261 ib_destroy_cq(to_mxrcd(xrcd)->cq);
1262 ib_dealloc_pd(to_mxrcd(xrcd)->pd);
1263 mlx4_xrcd_free(to_mdev(xrcd->device)->dev, to_mxrcd(xrcd)->xrcdn);
1264 return 0;
1264}
1265
1266static int add_gid_entry(struct ib_qp *ibqp, union ib_gid *gid)
1267{
1268 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
1269 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
1270 struct mlx4_ib_gid_entry *ge;
1271

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1528 int ret, i;
1529 int size = 0;
1530 void *ib_flow;
1531 struct mlx4_ib_dev *mdev = to_mdev(qp->device);
1532 struct mlx4_cmd_mailbox *mailbox;
1533 struct mlx4_net_trans_rule_hw_ctrl *ctrl;
1534 int default_flow;
1535
1265}
1266
1267static int add_gid_entry(struct ib_qp *ibqp, union ib_gid *gid)
1268{
1269 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
1270 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
1271 struct mlx4_ib_gid_entry *ge;
1272

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1529 int ret, i;
1530 int size = 0;
1531 void *ib_flow;
1532 struct mlx4_ib_dev *mdev = to_mdev(qp->device);
1533 struct mlx4_cmd_mailbox *mailbox;
1534 struct mlx4_net_trans_rule_hw_ctrl *ctrl;
1535 int default_flow;
1536
1536 static const u16 __mlx4_domain[] = {
1537 [IB_FLOW_DOMAIN_USER] = MLX4_DOMAIN_UVERBS,
1538 [IB_FLOW_DOMAIN_ETHTOOL] = MLX4_DOMAIN_ETHTOOL,
1539 [IB_FLOW_DOMAIN_RFS] = MLX4_DOMAIN_RFS,
1540 [IB_FLOW_DOMAIN_NIC] = MLX4_DOMAIN_NIC,
1541 };
1542
1543 if (flow_attr->priority > MLX4_IB_FLOW_MAX_PRIO) {
1544 pr_err("Invalid priority value %d\n", flow_attr->priority);
1545 return -EINVAL;
1546 }
1547
1537 if (flow_attr->priority > MLX4_IB_FLOW_MAX_PRIO) {
1538 pr_err("Invalid priority value %d\n", flow_attr->priority);
1539 return -EINVAL;
1540 }
1541
1548 if (domain >= IB_FLOW_DOMAIN_NUM) {
1549 pr_err("Invalid domain value %d\n", domain);
1550 return -EINVAL;
1551 }
1552
1553 if (mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type) < 0)
1554 return -EINVAL;
1555
1556 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
1557 if (IS_ERR(mailbox))
1558 return PTR_ERR(mailbox);
1559 ctrl = mailbox->buf;
1560
1542 if (mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type) < 0)
1543 return -EINVAL;
1544
1545 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
1546 if (IS_ERR(mailbox))
1547 return PTR_ERR(mailbox);
1548 ctrl = mailbox->buf;
1549
1561 ctrl->prio = cpu_to_be16(__mlx4_domain[domain] |
1562 flow_attr->priority);
1550 ctrl->prio = cpu_to_be16(domain | flow_attr->priority);
1563 ctrl->type = mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type);
1564 ctrl->port = flow_attr->port;
1565 ctrl->qpn = cpu_to_be32(qp->qp_num);
1566
1567 ib_flow = flow_attr + 1;
1568 size += sizeof(struct mlx4_net_trans_rule_hw_ctrl);
1569 /* Add default flows */
1570 default_flow = __mlx4_ib_default_rules_match(qp, flow_attr);

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1696 type[0] = MLX4_FS_UC_SNIFFER;
1697 }
1698 }
1699
1700 return err;
1701}
1702
1703static struct ib_flow *mlx4_ib_create_flow(struct ib_qp *qp,
1551 ctrl->type = mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type);
1552 ctrl->port = flow_attr->port;
1553 ctrl->qpn = cpu_to_be32(qp->qp_num);
1554
1555 ib_flow = flow_attr + 1;
1556 size += sizeof(struct mlx4_net_trans_rule_hw_ctrl);
1557 /* Add default flows */
1558 default_flow = __mlx4_ib_default_rules_match(qp, flow_attr);

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1684 type[0] = MLX4_FS_UC_SNIFFER;
1685 }
1686 }
1687
1688 return err;
1689}
1690
1691static struct ib_flow *mlx4_ib_create_flow(struct ib_qp *qp,
1704 struct ib_flow_attr *flow_attr,
1705 int domain, struct ib_udata *udata)
1692 struct ib_flow_attr *flow_attr,
1693 struct ib_udata *udata)
1706{
1707 int err = 0, i = 0, j = 0;
1708 struct mlx4_ib_flow *mflow;
1709 enum mlx4_net_trans_promisc_mode type[2];
1710 struct mlx4_dev *dev = (to_mdev(qp->device))->dev;
1711 int is_bonded = mlx4_is_bonded(dev);
1712
1713 if (flow_attr->port < 1 || flow_attr->port > qp->device->phys_port_cnt)

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1763 break;
1764
1765 default:
1766 err = -EINVAL;
1767 goto err_free;
1768 }
1769
1770 while (i < ARRAY_SIZE(type) && type[i]) {
1694{
1695 int err = 0, i = 0, j = 0;
1696 struct mlx4_ib_flow *mflow;
1697 enum mlx4_net_trans_promisc_mode type[2];
1698 struct mlx4_dev *dev = (to_mdev(qp->device))->dev;
1699 int is_bonded = mlx4_is_bonded(dev);
1700
1701 if (flow_attr->port < 1 || flow_attr->port > qp->device->phys_port_cnt)

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1751 break;
1752
1753 default:
1754 err = -EINVAL;
1755 goto err_free;
1756 }
1757
1758 while (i < ARRAY_SIZE(type) && type[i]) {
1771 err = __mlx4_ib_create_flow(qp, flow_attr, domain, type[i],
1772 &mflow->reg_id[i].id);
1759 err = __mlx4_ib_create_flow(qp, flow_attr, MLX4_DOMAIN_UVERBS,
1760 type[i], &mflow->reg_id[i].id);
1773 if (err)
1774 goto err_create_flow;
1775 if (is_bonded) {
1776 /* Application always sees one port so the mirror rule
1777 * must be on port #2
1778 */
1779 flow_attr->port = 2;
1780 err = __mlx4_ib_create_flow(qp, flow_attr,
1761 if (err)
1762 goto err_create_flow;
1763 if (is_bonded) {
1764 /* Application always sees one port so the mirror rule
1765 * must be on port #2
1766 */
1767 flow_attr->port = 2;
1768 err = __mlx4_ib_create_flow(qp, flow_attr,
1781 domain, type[j],
1769 MLX4_DOMAIN_UVERBS, type[j],
1782 &mflow->reg_id[j].mirror);
1783 flow_attr->port = 1;
1784 if (err)
1785 goto err_create_flow;
1786 j++;
1787 }
1788
1789 i++;

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2589 .destroy_rwq_ind_table = mlx4_ib_destroy_rwq_ind_table,
2590 .destroy_wq = mlx4_ib_destroy_wq,
2591 .modify_wq = mlx4_ib_modify_wq,
2592};
2593
2594static const struct ib_device_ops mlx4_ib_dev_mw_ops = {
2595 .alloc_mw = mlx4_ib_alloc_mw,
2596 .dealloc_mw = mlx4_ib_dealloc_mw,
1770 &mflow->reg_id[j].mirror);
1771 flow_attr->port = 1;
1772 if (err)
1773 goto err_create_flow;
1774 j++;
1775 }
1776
1777 i++;

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2577 .destroy_rwq_ind_table = mlx4_ib_destroy_rwq_ind_table,
2578 .destroy_wq = mlx4_ib_destroy_wq,
2579 .modify_wq = mlx4_ib_modify_wq,
2580};
2581
2582static const struct ib_device_ops mlx4_ib_dev_mw_ops = {
2583 .alloc_mw = mlx4_ib_alloc_mw,
2584 .dealloc_mw = mlx4_ib_dealloc_mw,
2585
2586 INIT_RDMA_OBJ_SIZE(ib_mw, mlx4_ib_mw, ibmw),
2597};
2598
2599static const struct ib_device_ops mlx4_ib_dev_xrc_ops = {
2600 .alloc_xrcd = mlx4_ib_alloc_xrcd,
2601 .dealloc_xrcd = mlx4_ib_dealloc_xrcd,
2602
2603 INIT_RDMA_OBJ_SIZE(ib_xrcd, mlx4_ib_xrcd, ibxrcd),
2604};

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2984 flow->num_of_specs = 1;
2985 flow->size = flow_size;
2986 ib_spec = (struct ib_flow_spec_ib *)(flow + 1);
2987 ib_spec->type = IB_FLOW_SPEC_IB;
2988 ib_spec->size = sizeof(struct ib_flow_spec_ib);
2989 /* Add an empty rule for IB L2 */
2990 memset(&ib_spec->mask, 0, sizeof(ib_spec->mask));
2991
2587};
2588
2589static const struct ib_device_ops mlx4_ib_dev_xrc_ops = {
2590 .alloc_xrcd = mlx4_ib_alloc_xrcd,
2591 .dealloc_xrcd = mlx4_ib_dealloc_xrcd,
2592
2593 INIT_RDMA_OBJ_SIZE(ib_xrcd, mlx4_ib_xrcd, ibxrcd),
2594};

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2974 flow->num_of_specs = 1;
2975 flow->size = flow_size;
2976 ib_spec = (struct ib_flow_spec_ib *)(flow + 1);
2977 ib_spec->type = IB_FLOW_SPEC_IB;
2978 ib_spec->size = sizeof(struct ib_flow_spec_ib);
2979 /* Add an empty rule for IB L2 */
2980 memset(&ib_spec->mask, 0, sizeof(ib_spec->mask));
2981
2992 err = __mlx4_ib_create_flow(&mqp->ibqp, flow,
2993 IB_FLOW_DOMAIN_NIC,
2994 MLX4_FS_REGULAR,
2995 &mqp->reg_id);
2982 err = __mlx4_ib_create_flow(&mqp->ibqp, flow, MLX4_DOMAIN_NIC,
2983 MLX4_FS_REGULAR, &mqp->reg_id);
2996 } else {
2997 err = __mlx4_ib_destroy_flow(mdev->dev, mqp->reg_id);
2998 }
2999 kfree(flow);
3000 return err;
3001}
3002
3003static void mlx4_ib_remove(struct mlx4_dev *dev, void *ibdev_ptr)

--- 379 unchanged lines hidden --- 		2984 } else {
2985 err = __mlx4_ib_destroy_flow(mdev->dev, mqp->reg_id);
2986 }
2987 kfree(flow);
2988 return err;
2989}
2990
2991static void mlx4_ib_remove(struct mlx4_dev *dev, void *ibdev_ptr)

--- 379 unchanged lines hidden ---