qp.c (301a36fa700f9add6e14f5a95c7573e01578343a) | qp.c (49b53a93a64ab0aaec10851b004297a3ac885433) |
---|---|
1/* 2 * Copyright (c) 2009-2010 Chelsio, Inc. All rights reserved. 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: --- 595 unchanged lines hidden (view full) --- 604 &wqe->recv.isgl, wr->sg_list, wr->num_sge, NULL); 605 if (ret) 606 return ret; 607 *len16 = DIV_ROUND_UP(sizeof wqe->recv + 608 wr->num_sge * sizeof(struct fw_ri_sge), 16); 609 return 0; 610} 611 | 1/* 2 * Copyright (c) 2009-2010 Chelsio, Inc. All rights reserved. 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: --- 595 unchanged lines hidden (view full) --- 604 &wqe->recv.isgl, wr->sg_list, wr->num_sge, NULL); 605 if (ret) 606 return ret; 607 *len16 = DIV_ROUND_UP(sizeof wqe->recv + 608 wr->num_sge * sizeof(struct fw_ri_sge), 16); 609 return 0; 610} 611 |
612static void build_tpte_memreg(struct fw_ri_fr_nsmr_tpte_wr *fr, 613 struct ib_reg_wr *wr, struct c4iw_mr *mhp, 614 u8 *len16) 615{ 616 __be64 *p = (__be64 *)fr->pbl; 617 618 fr->r2 = cpu_to_be32(0); 619 fr->stag = cpu_to_be32(mhp->ibmr.rkey); 620 621 fr->tpte.valid_to_pdid = cpu_to_be32(FW_RI_TPTE_VALID_F | 622 FW_RI_TPTE_STAGKEY_V((mhp->ibmr.rkey & FW_RI_TPTE_STAGKEY_M)) | 623 FW_RI_TPTE_STAGSTATE_V(1) | 624 FW_RI_TPTE_STAGTYPE_V(FW_RI_STAG_NSMR) | 625 FW_RI_TPTE_PDID_V(mhp->attr.pdid)); 626 fr->tpte.locread_to_qpid = cpu_to_be32( 627 FW_RI_TPTE_PERM_V(c4iw_ib_to_tpt_access(wr->access)) | 628 FW_RI_TPTE_ADDRTYPE_V(FW_RI_VA_BASED_TO) | 629 FW_RI_TPTE_PS_V(ilog2(wr->mr->page_size) - 12)); 630 fr->tpte.nosnoop_pbladdr = cpu_to_be32(FW_RI_TPTE_PBLADDR_V( 631 PBL_OFF(&mhp->rhp->rdev, mhp->attr.pbl_addr)>>3)); 632 fr->tpte.dca_mwbcnt_pstag = cpu_to_be32(0); 633 fr->tpte.len_hi = cpu_to_be32(0); 634 fr->tpte.len_lo = cpu_to_be32(mhp->ibmr.length); 635 fr->tpte.va_hi = cpu_to_be32(mhp->ibmr.iova >> 32); 636 fr->tpte.va_lo_fbo = cpu_to_be32(mhp->ibmr.iova & 0xffffffff); 637 638 p[0] = cpu_to_be64((u64)mhp->mpl[0]); 639 p[1] = cpu_to_be64((u64)mhp->mpl[1]); 640 641 *len16 = DIV_ROUND_UP(sizeof(*fr), 16); 642} 643 |
|
612static int build_memreg(struct t4_sq *sq, union t4_wr *wqe, | 644static int build_memreg(struct t4_sq *sq, union t4_wr *wqe, |
613 struct ib_reg_wr *wr, u8 *len16, bool dsgl_supported) | 645 struct ib_reg_wr *wr, struct c4iw_mr *mhp, u8 *len16, 646 bool dsgl_supported) |
614{ | 647{ |
615 struct c4iw_mr *mhp = to_c4iw_mr(wr->mr); | |
616 struct fw_ri_immd *imdp; 617 __be64 *p; 618 int i; 619 int pbllen = roundup(mhp->mpl_len * sizeof(u64), 32); 620 int rem; 621 622 if (mhp->mpl_len > t4_max_fr_depth(dsgl_supported && use_dsgl)) 623 return -EINVAL; --- 45 unchanged lines hidden (view full) --- 669 p = (__be64 *)sq->queue; 670 } 671 *len16 = DIV_ROUND_UP(sizeof(wqe->fr) + sizeof(*imdp) 672 + pbllen, 16); 673 } 674 return 0; 675} 676 | 648 struct fw_ri_immd *imdp; 649 __be64 *p; 650 int i; 651 int pbllen = roundup(mhp->mpl_len * sizeof(u64), 32); 652 int rem; 653 654 if (mhp->mpl_len > t4_max_fr_depth(dsgl_supported && use_dsgl)) 655 return -EINVAL; --- 45 unchanged lines hidden (view full) --- 701 p = (__be64 *)sq->queue; 702 } 703 *len16 = DIV_ROUND_UP(sizeof(wqe->fr) + sizeof(*imdp) 704 + pbllen, 16); 705 } 706 return 0; 707} 708 |
677static int build_inv_stag(union t4_wr *wqe, struct ib_send_wr *wr, 678 u8 *len16) | 709static int build_inv_stag(struct c4iw_dev *dev, union t4_wr *wqe, 710 struct ib_send_wr *wr, u8 *len16) |
679{ | 711{ |
712 struct c4iw_mr *mhp = get_mhp(dev, wr->ex.invalidate_rkey >> 8); 713 714 mhp->attr.state = 0; |
|
680 wqe->inv.stag_inv = cpu_to_be32(wr->ex.invalidate_rkey); 681 wqe->inv.r2 = 0; 682 *len16 = DIV_ROUND_UP(sizeof wqe->inv, 16); 683 return 0; 684} 685 | 715 wqe->inv.stag_inv = cpu_to_be32(wr->ex.invalidate_rkey); 716 wqe->inv.r2 = 0; 717 *len16 = DIV_ROUND_UP(sizeof wqe->inv, 16); 718 return 0; 719} 720 |
686static void _free_qp(struct kref *kref) | 721void _free_qp(struct kref *kref) |
687{ 688 struct c4iw_qp *qhp; 689 690 qhp = container_of(kref, struct c4iw_qp, kref); 691 PDBG("%s qhp %p\n", __func__, qhp); 692 kfree(qhp); 693} 694 --- 116 unchanged lines hidden (view full) --- 811 fw_flags = 0; 812 err = build_rdma_read(wqe, wr, &len16); 813 if (err) 814 break; 815 swsqe->read_len = wr->sg_list[0].length; 816 if (!qhp->wq.sq.oldest_read) 817 qhp->wq.sq.oldest_read = swsqe; 818 break; | 722{ 723 struct c4iw_qp *qhp; 724 725 qhp = container_of(kref, struct c4iw_qp, kref); 726 PDBG("%s qhp %p\n", __func__, qhp); 727 kfree(qhp); 728} 729 --- 116 unchanged lines hidden (view full) --- 846 fw_flags = 0; 847 err = build_rdma_read(wqe, wr, &len16); 848 if (err) 849 break; 850 swsqe->read_len = wr->sg_list[0].length; 851 if (!qhp->wq.sq.oldest_read) 852 qhp->wq.sq.oldest_read = swsqe; 853 break; |
819 case IB_WR_REG_MR: 820 fw_opcode = FW_RI_FR_NSMR_WR; | 854 case IB_WR_REG_MR: { 855 struct c4iw_mr *mhp = to_c4iw_mr(reg_wr(wr)->mr); 856 |
821 swsqe->opcode = FW_RI_FAST_REGISTER; | 857 swsqe->opcode = FW_RI_FAST_REGISTER; |
822 err = build_memreg(&qhp->wq.sq, wqe, reg_wr(wr), &len16, 823 qhp->rhp->rdev.lldi.ulptx_memwrite_dsgl); | 858 if (qhp->rhp->rdev.lldi.fr_nsmr_tpte_wr_support && 859 !mhp->attr.state && mhp->mpl_len <= 2) { 860 fw_opcode = FW_RI_FR_NSMR_TPTE_WR; 861 build_tpte_memreg(&wqe->fr_tpte, reg_wr(wr), 862 mhp, &len16); 863 } else { 864 fw_opcode = FW_RI_FR_NSMR_WR; 865 err = build_memreg(&qhp->wq.sq, wqe, reg_wr(wr), 866 mhp, &len16, 867 qhp->rhp->rdev.lldi.ulptx_memwrite_dsgl); 868 if (err) 869 break; 870 } 871 mhp->attr.state = 1; |
824 break; | 872 break; |
873 } |
|
825 case IB_WR_LOCAL_INV: 826 if (wr->send_flags & IB_SEND_FENCE) 827 fw_flags |= FW_RI_LOCAL_FENCE_FLAG; 828 fw_opcode = FW_RI_INV_LSTAG_WR; 829 swsqe->opcode = FW_RI_LOCAL_INV; | 874 case IB_WR_LOCAL_INV: 875 if (wr->send_flags & IB_SEND_FENCE) 876 fw_flags |= FW_RI_LOCAL_FENCE_FLAG; 877 fw_opcode = FW_RI_INV_LSTAG_WR; 878 swsqe->opcode = FW_RI_LOCAL_INV; |
830 err = build_inv_stag(wqe, wr, &len16); | 879 err = build_inv_stag(qhp->rhp, wqe, wr, &len16); |
831 break; 832 default: 833 PDBG("%s post of type=%d TBD!\n", __func__, 834 wr->opcode); 835 err = -EINVAL; 836 } 837 if (err) { 838 *bad_wr = wr; --- 1105 unchanged lines hidden --- | 880 break; 881 default: 882 PDBG("%s post of type=%d TBD!\n", __func__, 883 wr->opcode); 884 err = -EINVAL; 885 } 886 if (err) { 887 *bad_wr = wr; --- 1105 unchanged lines hidden --- |