afe4403.c (617894cd848f592fa84d7cf561dc80929afc66ff) afe4403.c (3593cd53962fa17e4eaaae8faa5c8f62ec7bbd5e)
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * AFE4403 Heart Rate Monitors and Low-Cost Pulse Oximeters
4 *
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * AFE4403 Heart Rate Monitors and Low-Cost Pulse Oximeters
4 *
5 * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
5 * Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/
6 * Andrew F. Davis <afd@ti.com>
7 */
8
9#include <linux/device.h>
10#include <linux/err.h>
11#include <linux/interrupt.h>
12#include <linux/kernel.h>
13#include <linux/module.h>

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60 * struct afe4403_data - AFE4403 device instance data
61 * @dev: Device structure
62 * @spi: SPI device handle
63 * @regmap: Register map of the device
64 * @fields: Register fields of the device
65 * @regulator: Pointer to the regulator for the IC
66 * @trig: IIO trigger for this device
67 * @irq: ADC_RDY line interrupt number
6 * Andrew F. Davis <afd@ti.com>
7 */
8
9#include <linux/device.h>
10#include <linux/err.h>
11#include <linux/interrupt.h>
12#include <linux/kernel.h>
13#include <linux/module.h>

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60 * struct afe4403_data - AFE4403 device instance data
61 * @dev: Device structure
62 * @spi: SPI device handle
63 * @regmap: Register map of the device
64 * @fields: Register fields of the device
65 * @regulator: Pointer to the regulator for the IC
66 * @trig: IIO trigger for this device
67 * @irq: ADC_RDY line interrupt number
68 * @buffer: Used to construct data layout to push into IIO buffer.
69 */
70struct afe4403_data {
71 struct device *dev;
72 struct spi_device *spi;
73 struct regmap *regmap;
74 struct regmap_field *fields[F_MAX_FIELDS];
75 struct regulator *regulator;
76 struct iio_trigger *trig;
77 int irq;
68 */
69struct afe4403_data {
70 struct device *dev;
71 struct spi_device *spi;
72 struct regmap *regmap;
73 struct regmap_field *fields[F_MAX_FIELDS];
74 struct regulator *regulator;
75 struct iio_trigger *trig;
76 int irq;
78 /* Ensure suitable alignment for timestamp */
79 s32 buffer[8] __aligned(8);
80};
81
82enum afe4403_chan_id {
83 LED2 = 1,
84 ALED2,
85 LED1,
86 ALED1,
87 LED2_ALED2,

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307};
308
309static irqreturn_t afe4403_trigger_handler(int irq, void *private)
310{
311 struct iio_poll_func *pf = private;
312 struct iio_dev *indio_dev = pf->indio_dev;
313 struct afe4403_data *afe = iio_priv(indio_dev);
314 int ret, bit, i = 0;
77};
78
79enum afe4403_chan_id {
80 LED2 = 1,
81 ALED2,
82 LED1,
83 ALED1,
84 LED2_ALED2,

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304};
305
306static irqreturn_t afe4403_trigger_handler(int irq, void *private)
307{
308 struct iio_poll_func *pf = private;
309 struct iio_dev *indio_dev = pf->indio_dev;
310 struct afe4403_data *afe = iio_priv(indio_dev);
311 int ret, bit, i = 0;
312 s32 buffer[8];
315 u8 tx[4] = {AFE440X_CONTROL0, 0x0, 0x0, AFE440X_CONTROL0_READ};
316 u8 rx[3];
317
318 /* Enable reading from the device */
319 ret = spi_write_then_read(afe->spi, tx, 4, NULL, 0);
320 if (ret)
321 goto err;
322
323 for_each_set_bit(bit, indio_dev->active_scan_mask,
324 indio_dev->masklength) {
325 ret = spi_write_then_read(afe->spi,
326 &afe4403_channel_values[bit], 1,
327 rx, sizeof(rx));
328 if (ret)
329 goto err;
330
313 u8 tx[4] = {AFE440X_CONTROL0, 0x0, 0x0, AFE440X_CONTROL0_READ};
314 u8 rx[3];
315
316 /* Enable reading from the device */
317 ret = spi_write_then_read(afe->spi, tx, 4, NULL, 0);
318 if (ret)
319 goto err;
320
321 for_each_set_bit(bit, indio_dev->active_scan_mask,
322 indio_dev->masklength) {
323 ret = spi_write_then_read(afe->spi,
324 &afe4403_channel_values[bit], 1,
325 rx, sizeof(rx));
326 if (ret)
327 goto err;
328
331 afe->buffer[i++] = get_unaligned_be24(&rx[0]);
329 buffer[i++] = get_unaligned_be24(&rx[0]);
332 }
333
334 /* Disable reading from the device */
335 tx[3] = AFE440X_CONTROL0_WRITE;
336 ret = spi_write_then_read(afe->spi, tx, 4, NULL, 0);
337 if (ret)
338 goto err;
339
330 }
331
332 /* Disable reading from the device */
333 tx[3] = AFE440X_CONTROL0_WRITE;
334 ret = spi_write_then_read(afe->spi, tx, 4, NULL, 0);
335 if (ret)
336 goto err;
337
340 iio_push_to_buffers_with_timestamp(indio_dev, afe->buffer,
341 pf->timestamp);
338 iio_push_to_buffers_with_timestamp(indio_dev, buffer, pf->timestamp);
342err:
343 iio_trigger_notify_done(indio_dev->trig);
344
345 return IRQ_HANDLED;
346}
347
348static const struct iio_trigger_ops afe4403_trigger_ops = {
349};

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507 ret = regmap_multi_reg_write(afe->regmap, afe4403_reg_sequences,
508 ARRAY_SIZE(afe4403_reg_sequences));
509 if (ret) {
510 dev_err(afe->dev, "Unable to set register defaults\n");
511 goto err_disable_reg;
512 }
513
514 indio_dev->modes = INDIO_DIRECT_MODE;
339err:
340 iio_trigger_notify_done(indio_dev->trig);
341
342 return IRQ_HANDLED;
343}
344
345static const struct iio_trigger_ops afe4403_trigger_ops = {
346};

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504 ret = regmap_multi_reg_write(afe->regmap, afe4403_reg_sequences,
505 ARRAY_SIZE(afe4403_reg_sequences));
506 if (ret) {
507 dev_err(afe->dev, "Unable to set register defaults\n");
508 goto err_disable_reg;
509 }
510
511 indio_dev->modes = INDIO_DIRECT_MODE;
515 indio_dev->dev.parent = afe->dev;
516 indio_dev->channels = afe4403_channels;
517 indio_dev->num_channels = ARRAY_SIZE(afe4403_channels);
518 indio_dev->name = AFE4403_DRIVER_NAME;
519 indio_dev->info = &afe4403_iio_info;
520
521 if (afe->irq > 0) {
522 afe->trig = devm_iio_trigger_alloc(afe->dev,
523 "%s-dev%d",

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512 indio_dev->channels = afe4403_channels;
513 indio_dev->num_channels = ARRAY_SIZE(afe4403_channels);
514 indio_dev->name = AFE4403_DRIVER_NAME;
515 indio_dev->info = &afe4403_iio_info;
516
517 if (afe->irq > 0) {
518 afe->trig = devm_iio_trigger_alloc(afe->dev,
519 "%s-dev%d",

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