i2c-rk3x.c (82b925c405444b760e743b55a9ad498cb3551afe) i2c-rk3x.c (29209338b22a61c9ba67badd5f36e96cda1892d8)
1/*
2 * Driver for I2C adapter in Rockchip RK3xxx SoC
3 *
4 * Max Schwarz <max.schwarz@online.de>
5 * based on the patches by Rockchip Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as

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203 u32 con;
204
205 con = i2c_readl(i2c, REG_CON);
206
207 /*
208 * The hw can read up to 32 bytes at a time. If we need more than one
209 * chunk, send an ACK after the last byte of the current chunk.
210 */
1/*
2 * Driver for I2C adapter in Rockchip RK3xxx SoC
3 *
4 * Max Schwarz <max.schwarz@online.de>
5 * based on the patches by Rockchip Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as

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203 u32 con;
204
205 con = i2c_readl(i2c, REG_CON);
206
207 /*
208 * The hw can read up to 32 bytes at a time. If we need more than one
209 * chunk, send an ACK after the last byte of the current chunk.
210 */
211 if (unlikely(len > 32)) {
211 if (len > 32) {
212 len = 32;
213 con &= ~REG_CON_LASTACK;
214 } else {
215 con |= REG_CON_LASTACK;
216 }
217
218 /* make sure we are in plain RX mode if we read a second chunk */
219 if (i2c->processed != 0) {

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398
399 ipd &= ~REG_INT_NAKRCV;
400
401 if (!(i2c->msg->flags & I2C_M_IGNORE_NAK))
402 rk3x_i2c_stop(i2c, -ENXIO);
403 }
404
405 /* is there anything left to handle? */
212 len = 32;
213 con &= ~REG_CON_LASTACK;
214 } else {
215 con |= REG_CON_LASTACK;
216 }
217
218 /* make sure we are in plain RX mode if we read a second chunk */
219 if (i2c->processed != 0) {

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398
399 ipd &= ~REG_INT_NAKRCV;
400
401 if (!(i2c->msg->flags & I2C_M_IGNORE_NAK))
402 rk3x_i2c_stop(i2c, -ENXIO);
403 }
404
405 /* is there anything left to handle? */
406 if (unlikely((ipd & REG_INT_ALL) == 0))
406 if ((ipd & REG_INT_ALL) == 0)
407 goto out;
408
409 switch (i2c->state) {
410 case STATE_START:
411 rk3x_i2c_handle_start(i2c, ipd);
412 break;
413 case STATE_WRITE:
414 rk3x_i2c_handle_write(i2c, ipd);

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428 return IRQ_HANDLED;
429}
430
431static void rk3x_i2c_set_scl_rate(struct rk3x_i2c *i2c, unsigned long scl_rate)
432{
433 unsigned long i2c_rate = clk_get_rate(i2c->clk);
434 unsigned int div;
435
407 goto out;
408
409 switch (i2c->state) {
410 case STATE_START:
411 rk3x_i2c_handle_start(i2c, ipd);
412 break;
413 case STATE_WRITE:
414 rk3x_i2c_handle_write(i2c, ipd);

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428 return IRQ_HANDLED;
429}
430
431static void rk3x_i2c_set_scl_rate(struct rk3x_i2c *i2c, unsigned long scl_rate)
432{
433 unsigned long i2c_rate = clk_get_rate(i2c->clk);
434 unsigned int div;
435
436 /* SCL rate = (clk rate) / (8 * DIV) */
437 div = DIV_ROUND_UP(i2c_rate, scl_rate * 8);
436 /* set DIV = DIVH = DIVL
437 * SCL rate = (clk rate) / (8 * (DIVH + 1 + DIVL + 1))
438 * = (clk rate) / (16 * (DIV + 1))
439 */
440 div = DIV_ROUND_UP(i2c_rate, scl_rate * 16) - 1;
438
441
439 /* The lower and upper half of the CLKDIV reg describe the length of
440 * SCL low & high periods. */
441 div = DIV_ROUND_UP(div, 2);
442
443 i2c_writel(i2c, (div << 16) | (div & 0xffff), REG_CLKDIV);
444}
445
446/**
447 * Setup I2C registers for an I2C operation specified by msgs, num.
448 *
449 * Must be called with i2c->lock held.
450 *

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442 i2c_writel(i2c, (div << 16) | (div & 0xffff), REG_CLKDIV);
443}
444
445/**
446 * Setup I2C registers for an I2C operation specified by msgs, num.
447 *
448 * Must be called with i2c->lock held.
449 *

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