sor.c (a6ed68d6468bd5a3da78a103344ded1435fed57a) | sor.c (be0b23f28c028bf11e47d16f79c784106286bcb7) |
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1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Copyright (C) 2013 NVIDIA Corporation 4 */ 5 6#include <linux/clk.h> 7#include <linux/clk-provider.h> 8#include <linux/debugfs.h> --- 3898 unchanged lines hidden (view full) --- 3907 dev_err(&pdev->dev, "failed to remove SOR: %d\n", err); 3908 } 3909 3910 tegra_output_remove(&sor->output); 3911 3912 return 0; 3913} 3914 | 1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Copyright (C) 2013 NVIDIA Corporation 4 */ 5 6#include <linux/clk.h> 7#include <linux/clk-provider.h> 8#include <linux/debugfs.h> --- 3898 unchanged lines hidden (view full) --- 3907 dev_err(&pdev->dev, "failed to remove SOR: %d\n", err); 3908 } 3909 3910 tegra_output_remove(&sor->output); 3911 3912 return 0; 3913} 3914 |
3915#ifdef CONFIG_PM 3916static int tegra_sor_suspend(struct device *dev) | 3915static int tegra_sor_runtime_suspend(struct device *dev) |
3917{ 3918 struct tegra_sor *sor = dev_get_drvdata(dev); 3919 int err; 3920 3921 if (sor->rst) { 3922 err = reset_control_assert(sor->rst); 3923 if (err < 0) { 3924 dev_err(dev, "failed to assert reset: %d\n", err); --- 5 unchanged lines hidden (view full) --- 3930 3931 usleep_range(1000, 2000); 3932 3933 clk_disable_unprepare(sor->clk); 3934 3935 return 0; 3936} 3937 | 3916{ 3917 struct tegra_sor *sor = dev_get_drvdata(dev); 3918 int err; 3919 3920 if (sor->rst) { 3921 err = reset_control_assert(sor->rst); 3922 if (err < 0) { 3923 dev_err(dev, "failed to assert reset: %d\n", err); --- 5 unchanged lines hidden (view full) --- 3929 3930 usleep_range(1000, 2000); 3931 3932 clk_disable_unprepare(sor->clk); 3933 3934 return 0; 3935} 3936 |
3938static int tegra_sor_resume(struct device *dev) | 3937static int tegra_sor_runtime_resume(struct device *dev) |
3939{ 3940 struct tegra_sor *sor = dev_get_drvdata(dev); 3941 int err; 3942 3943 err = clk_prepare_enable(sor->clk); 3944 if (err < 0) { 3945 dev_err(dev, "failed to enable clock: %d\n", err); 3946 return err; --- 15 unchanged lines hidden (view full) --- 3962 reset_control_release(sor->rst); 3963 clk_disable_unprepare(sor->clk); 3964 return err; 3965 } 3966 } 3967 3968 return 0; 3969} | 3938{ 3939 struct tegra_sor *sor = dev_get_drvdata(dev); 3940 int err; 3941 3942 err = clk_prepare_enable(sor->clk); 3943 if (err < 0) { 3944 dev_err(dev, "failed to enable clock: %d\n", err); 3945 return err; --- 15 unchanged lines hidden (view full) --- 3961 reset_control_release(sor->rst); 3962 clk_disable_unprepare(sor->clk); 3963 return err; 3964 } 3965 } 3966 3967 return 0; 3968} |
3970#endif | |
3971 | 3969 |
3970static int tegra_sor_suspend(struct device *dev) 3971{ 3972 struct tegra_sor *sor = dev_get_drvdata(dev); 3973 3974 return regulator_disable(sor->hdmi_supply); 3975} 3976 3977static int tegra_sor_resume(struct device *dev) 3978{ 3979 struct tegra_sor *sor = dev_get_drvdata(dev); 3980 3981 return regulator_enable(sor->hdmi_supply); 3982} 3983 |
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3972static const struct dev_pm_ops tegra_sor_pm_ops = { | 3984static const struct dev_pm_ops tegra_sor_pm_ops = { |
3973 SET_RUNTIME_PM_OPS(tegra_sor_suspend, tegra_sor_resume, NULL) | 3985 SET_RUNTIME_PM_OPS(tegra_sor_runtime_suspend, tegra_sor_runtime_resume, 3986 NULL) 3987 SET_SYSTEM_SLEEP_PM_OPS(tegra_sor_suspend, tegra_sor_resume) |
3974}; 3975 3976struct platform_driver tegra_sor_driver = { 3977 .driver = { 3978 .name = "tegra-sor", 3979 .of_match_table = tegra_sor_of_match, 3980 .pm = &tegra_sor_pm_ops, 3981 }, 3982 .probe = tegra_sor_probe, 3983 .remove = tegra_sor_remove, 3984}; | 3988}; 3989 3990struct platform_driver tegra_sor_driver = { 3991 .driver = { 3992 .name = "tegra-sor", 3993 .of_match_table = tegra_sor_of_match, 3994 .pm = &tegra_sor_pm_ops, 3995 }, 3996 .probe = tegra_sor_probe, 3997 .remove = tegra_sor_remove, 3998}; |