dc.c (1087fac18b8e3ec8fadf1595bbc46dce7ff08a81) | dc.c (363541e8eeed16fdf696252008ddee823730f82c) |
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1/* 2 * Copyright (C) 2012 Avionic Design GmbH 3 * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License version 2 as 7 * published by the Free Software Foundation. 8 */ --- 1247 unchanged lines hidden (view full) --- 1256 1257 /* fallback to software emulated VBLANK counter */ 1258 return drm_crtc_vblank_count(&dc->base); 1259} 1260 1261static int tegra_dc_enable_vblank(struct drm_crtc *crtc) 1262{ 1263 struct tegra_dc *dc = to_tegra_dc(crtc); | 1/* 2 * Copyright (C) 2012 Avionic Design GmbH 3 * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License version 2 as 7 * published by the Free Software Foundation. 8 */ --- 1247 unchanged lines hidden (view full) --- 1256 1257 /* fallback to software emulated VBLANK counter */ 1258 return drm_crtc_vblank_count(&dc->base); 1259} 1260 1261static int tegra_dc_enable_vblank(struct drm_crtc *crtc) 1262{ 1263 struct tegra_dc *dc = to_tegra_dc(crtc); |
1264 unsigned long value, flags; | 1264 u32 value; |
1265 | 1265 |
1266 spin_lock_irqsave(&dc->lock, flags); 1267 | |
1268 value = tegra_dc_readl(dc, DC_CMD_INT_MASK); 1269 value |= VBLANK_INT; 1270 tegra_dc_writel(dc, value, DC_CMD_INT_MASK); 1271 | 1266 value = tegra_dc_readl(dc, DC_CMD_INT_MASK); 1267 value |= VBLANK_INT; 1268 tegra_dc_writel(dc, value, DC_CMD_INT_MASK); 1269 |
1272 spin_unlock_irqrestore(&dc->lock, flags); 1273 | |
1274 return 0; 1275} 1276 1277static void tegra_dc_disable_vblank(struct drm_crtc *crtc) 1278{ 1279 struct tegra_dc *dc = to_tegra_dc(crtc); | 1270 return 0; 1271} 1272 1273static void tegra_dc_disable_vblank(struct drm_crtc *crtc) 1274{ 1275 struct tegra_dc *dc = to_tegra_dc(crtc); |
1280 unsigned long value, flags; | 1276 u32 value; |
1281 | 1277 |
1282 spin_lock_irqsave(&dc->lock, flags); 1283 | |
1284 value = tegra_dc_readl(dc, DC_CMD_INT_MASK); 1285 value &= ~VBLANK_INT; 1286 tegra_dc_writel(dc, value, DC_CMD_INT_MASK); | 1278 value = tegra_dc_readl(dc, DC_CMD_INT_MASK); 1279 value &= ~VBLANK_INT; 1280 tegra_dc_writel(dc, value, DC_CMD_INT_MASK); |
1287 1288 spin_unlock_irqrestore(&dc->lock, flags); | |
1289} 1290 1291static const struct drm_crtc_funcs tegra_crtc_funcs = { 1292 .page_flip = drm_atomic_helper_page_flip, 1293 .set_config = drm_atomic_helper_set_config, 1294 .destroy = tegra_dc_destroy, 1295 .reset = tegra_crtc_reset, 1296 .atomic_duplicate_state = tegra_crtc_atomic_duplicate_state, --- 731 unchanged lines hidden (view full) --- 2028 int err; 2029 2030 dc = devm_kzalloc(&pdev->dev, sizeof(*dc), GFP_KERNEL); 2031 if (!dc) 2032 return -ENOMEM; 2033 2034 dc->soc = of_device_get_match_data(&pdev->dev); 2035 | 1281} 1282 1283static const struct drm_crtc_funcs tegra_crtc_funcs = { 1284 .page_flip = drm_atomic_helper_page_flip, 1285 .set_config = drm_atomic_helper_set_config, 1286 .destroy = tegra_dc_destroy, 1287 .reset = tegra_crtc_reset, 1288 .atomic_duplicate_state = tegra_crtc_atomic_duplicate_state, --- 731 unchanged lines hidden (view full) --- 2020 int err; 2021 2022 dc = devm_kzalloc(&pdev->dev, sizeof(*dc), GFP_KERNEL); 2023 if (!dc) 2024 return -ENOMEM; 2025 2026 dc->soc = of_device_get_match_data(&pdev->dev); 2027 |
2036 spin_lock_init(&dc->lock); | |
2037 INIT_LIST_HEAD(&dc->list); 2038 dc->dev = &pdev->dev; 2039 2040 err = tegra_dc_parse_dt(dc); 2041 if (err < 0) 2042 return err; 2043 2044 dc->clk = devm_clk_get(&pdev->dev, NULL); --- 162 unchanged lines hidden --- | 2028 INIT_LIST_HEAD(&dc->list); 2029 dc->dev = &pdev->dev; 2030 2031 err = tegra_dc_parse_dt(dc); 2032 if (err < 0) 2033 return err; 2034 2035 dc->clk = devm_clk_get(&pdev->dev, NULL); --- 162 unchanged lines hidden --- |