rs600.c (f712812e1ba7f17a270f285c3e7e70c65186a8b4) rs600.c (798bcf7341cd434f89a4ddd6882ac043b1399825)
1/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation

--- 180 unchanged lines hidden (view full) ---

189 dyn_backbias_cntl |= IO_CG_BACKBIAS_EN;
190 else
191 dyn_backbias_cntl &= ~IO_CG_BACKBIAS_EN;
192 WREG32_PLL(DYN_BACKBIAS_CNTL, dyn_backbias_cntl);
193
194 /* set pcie lanes */
195 if ((rdev->flags & RADEON_IS_PCIE) &&
196 !(rdev->flags & RADEON_IS_IGP) &&
1/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation

--- 180 unchanged lines hidden (view full) ---

189 dyn_backbias_cntl |= IO_CG_BACKBIAS_EN;
190 else
191 dyn_backbias_cntl &= ~IO_CG_BACKBIAS_EN;
192 WREG32_PLL(DYN_BACKBIAS_CNTL, dyn_backbias_cntl);
193
194 /* set pcie lanes */
195 if ((rdev->flags & RADEON_IS_PCIE) &&
196 !(rdev->flags & RADEON_IS_IGP) &&
197 rdev->asic->set_pcie_lanes &&
197 rdev->asic->pm.set_pcie_lanes &&
198 (ps->pcie_lanes !=
199 rdev->pm.power_state[rdev->pm.current_power_state_index].pcie_lanes)) {
200 radeon_set_pcie_lanes(rdev,
201 ps->pcie_lanes);
202 DRM_DEBUG("Setting: p: %d\n", ps->pcie_lanes);
203 }
204}
205

--- 819 unchanged lines hidden --- 		198 (ps->pcie_lanes !=
199 rdev->pm.power_state[rdev->pm.current_power_state_index].pcie_lanes)) {
200 radeon_set_pcie_lanes(rdev,
201 ps->pcie_lanes);
202 DRM_DEBUG("Setting: p: %d\n", ps->pcie_lanes);
203 }
204}
205

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