radeon.h - OpenGrok cross reference for /openbmc/linux/drivers/gpu/drm/radeon/radeon.h

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radeon.h (c79a49ca000ebcf4adf5448366284c5c1f25aa20)	radeon.h (798bcf7341cd434f89a4ddd6882ac043b1399825)
1/* 2 * Copyright 2008 Advanced Micro Devices, Inc. 3 * Copyright 2008 Red Hat Inc. 4 * Copyright 2009 Jerome Glisse. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation --- 1174 unchanged lines hidden (view full) --- 1183 uint64_t src_offset, 1184 uint64_t dst_offset, 1185 unsigned num_gpu_pages, 1186 struct radeon_fence fence); 1187 / ring used for bo copies */ 1188 u32 copy_ring_index; 1189 } copy; 1190	1/* 2 * Copyright 2008 Advanced Micro Devices, Inc. 3 * Copyright 2008 Red Hat Inc. 4 * Copyright 2009 Jerome Glisse. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation --- 1174 unchanged lines hidden (view full) --- 1183 uint64_t src_offset, 1184 uint64_t dst_offset, 1185 unsigned num_gpu_pages, 1186 struct radeon_fence fence); 1187 / ring used for bo copies */ 1188 u32 copy_ring_index; 1189 } copy; 1190
1191 uint32_t (get_engine_clock)(struct radeon_device rdev); 1192 void (set_engine_clock)(struct radeon_device rdev, uint32_t eng_clock); 1193 uint32_t (get_memory_clock)(struct radeon_device rdev); 1194 void (set_memory_clock)(struct radeon_device rdev, uint32_t mem_clock); 1195 int (get_pcie_lanes)(struct radeon_device rdev); 1196 void (set_pcie_lanes)(struct radeon_device rdev, int lanes); 1197 void (set_clock_gating)(struct radeon_device rdev, int enable);
1198 int (set_surface_reg)(struct radeon_device rdev, int reg, 1199 uint32_t tiling_flags, uint32_t pitch, 1200 uint32_t offset, uint32_t obj_size); 1201 void (clear_surface_reg)(struct radeon_device rdev, int reg); 1202 1203 struct { 1204 void (init)(struct radeon_device rdev); 1205 void (fini)(struct radeon_device rdev); --- 12 unchanged lines hidden (view full) --- 1218 bool (gui_idle)(struct radeon_device rdev); 1219 /* power management / 1220 struct { 1221 void (misc)(struct radeon_device rdev); 1222 void (prepare)(struct radeon_device rdev); 1223 void (finish)(struct radeon_device rdev); 1224 void (init_profile)(struct radeon_device rdev); 1225 void (get_dynpm_state)(struct radeon_device *rdev);	1191 int (set_surface_reg)(struct radeon_device rdev, int reg, 1192 uint32_t tiling_flags, uint32_t pitch, 1193 uint32_t offset, uint32_t obj_size); 1194 void (clear_surface_reg)(struct radeon_device rdev, int reg); 1195 1196 struct { 1197 void (init)(struct radeon_device rdev); 1198 void (fini)(struct radeon_device rdev); --- 12 unchanged lines hidden (view full) --- 1211 bool (gui_idle)(struct radeon_device rdev); 1212 /* power management / 1213 struct { 1214 void (misc)(struct radeon_device rdev); 1215 void (prepare)(struct radeon_device rdev); 1216 void (finish)(struct radeon_device rdev); 1217 void (init_profile)(struct radeon_device rdev); 1218 void (get_dynpm_state)(struct radeon_device *rdev);
	1219 uint32_t (get_engine_clock)(struct radeon_device rdev); 1220 void (set_engine_clock)(struct radeon_device rdev, uint32_t eng_clock); 1221 uint32_t (get_memory_clock)(struct radeon_device rdev); 1222 void (set_memory_clock)(struct radeon_device rdev, uint32_t mem_clock); 1223 int (get_pcie_lanes)(struct radeon_device rdev); 1224 void (set_pcie_lanes)(struct radeon_device rdev, int lanes); 1225 void (set_clock_gating)(struct radeon_device rdev, int enable);
1226 } pm; 1227 /* pageflipping / 1228 struct { 1229 void (pre_page_flip)(struct radeon_device rdev, int crtc); 1230 u32 (page_flip)(struct radeon_device rdev, int crtc, u64 crtc_base); 1231 void (post_page_flip)(struct radeon_device rdev, int crtc); 1232 } pflip; 1233 --- 461 unchanged lines hidden* (view full) --- 1695#define radeon_fence_ring_emit(rdev, r, fence) (rdev)->asic->ring[(r)].emit_fence((rdev), (fence)) 1696#define radeon_semaphore_ring_emit(rdev, r, cp, semaphore, emit_wait) (rdev)->asic->ring[(r)].emit_semaphore((rdev), (cp), (semaphore), (emit_wait)) 1697#define radeon_copy_blit(rdev, s, d, np, f) (rdev)->asic->copy.blit((rdev), (s), (d), (np), (f)) 1698#define radeon_copy_dma(rdev, s, d, np, f) (rdev)->asic->copy.dma((rdev), (s), (d), (np), (f)) 1699#define radeon_copy(rdev, s, d, np, f) (rdev)->asic->copy.copy((rdev), (s), (d), (np), (f)) 1700#define radeon_copy_blit_ring_index(rdev) (rdev)->asic->copy.blit_ring_index 1701#define radeon_copy_dma_ring_index(rdev) (rdev)->asic->copy.dma_ring_index 1702#define radeon_copy_ring_index(rdev) (rdev)->asic->copy.copy_ring_index	1226 } pm; 1227 /* pageflipping / 1228 struct { 1229 void (pre_page_flip)(struct radeon_device rdev, int crtc); 1230 u32 (page_flip)(struct radeon_device rdev, int crtc, u64 crtc_base); 1231 void (post_page_flip)(struct radeon_device rdev, int crtc); 1232 } pflip; 1233 --- 461 unchanged lines hidden* (view full) --- 1695#define radeon_fence_ring_emit(rdev, r, fence) (rdev)->asic->ring[(r)].emit_fence((rdev), (fence)) 1696#define radeon_semaphore_ring_emit(rdev, r, cp, semaphore, emit_wait) (rdev)->asic->ring[(r)].emit_semaphore((rdev), (cp), (semaphore), (emit_wait)) 1697#define radeon_copy_blit(rdev, s, d, np, f) (rdev)->asic->copy.blit((rdev), (s), (d), (np), (f)) 1698#define radeon_copy_dma(rdev, s, d, np, f) (rdev)->asic->copy.dma((rdev), (s), (d), (np), (f)) 1699#define radeon_copy(rdev, s, d, np, f) (rdev)->asic->copy.copy((rdev), (s), (d), (np), (f)) 1700#define radeon_copy_blit_ring_index(rdev) (rdev)->asic->copy.blit_ring_index 1701#define radeon_copy_dma_ring_index(rdev) (rdev)->asic->copy.dma_ring_index 1702#define radeon_copy_ring_index(rdev) (rdev)->asic->copy.copy_ring_index
1703#define radeon_get_engine_clock(rdev) (rdev)->asic->get_engine_clock((rdev)) 1704#define radeon_set_engine_clock(rdev, e) (rdev)->asic->set_engine_clock((rdev), (e)) 1705#define radeon_get_memory_clock(rdev) (rdev)->asic->get_memory_clock((rdev)) 1706#define radeon_set_memory_clock(rdev, e) (rdev)->asic->set_memory_clock((rdev), (e)) 1707#define radeon_get_pcie_lanes(rdev) (rdev)->asic->get_pcie_lanes((rdev)) 1708#define radeon_set_pcie_lanes(rdev, l) (rdev)->asic->set_pcie_lanes((rdev), (l)) 1709#define radeon_set_clock_gating(rdev, e) (rdev)->asic->set_clock_gating((rdev), (e))	1703#define radeon_get_engine_clock(rdev) (rdev)->asic->pm.get_engine_clock((rdev)) 1704#define radeon_set_engine_clock(rdev, e) (rdev)->asic->pm.set_engine_clock((rdev), (e)) 1705#define radeon_get_memory_clock(rdev) (rdev)->asic->pm.get_memory_clock((rdev)) 1706#define radeon_set_memory_clock(rdev, e) (rdev)->asic->pm.set_memory_clock((rdev), (e)) 1707#define radeon_get_pcie_lanes(rdev) (rdev)->asic->pm.get_pcie_lanes((rdev)) 1708#define radeon_set_pcie_lanes(rdev, l) (rdev)->asic->pm.set_pcie_lanes((rdev), (l)) 1709#define radeon_set_clock_gating(rdev, e) (rdev)->asic->pm.set_clock_gating((rdev), (e))
1710#define radeon_set_surface_reg(rdev, r, f, p, o, s) ((rdev)->asic->set_surface_reg((rdev), (r), (f), (p), (o), (s))) 1711#define radeon_clear_surface_reg(rdev, r) ((rdev)->asic->clear_surface_reg((rdev), (r))) 1712#define radeon_bandwidth_update(rdev) (rdev)->asic->display.bandwidth_update((rdev)) 1713#define radeon_hpd_init(rdev) (rdev)->asic->hpd.init((rdev)) 1714#define radeon_hpd_fini(rdev) (rdev)->asic->hpd.fini((rdev)) 1715#define radeon_hpd_sense(rdev, h) (rdev)->asic->hpd.sense((rdev), (h)) 1716#define radeon_hpd_set_polarity(rdev, h) (rdev)->asic->hpd.set_polarity((rdev), (h)) 1717#define radeon_gui_idle(rdev) (rdev)->asic->gui_idle((rdev)) --- 100 unchanged lines hidden ---	1710#define radeon_set_surface_reg(rdev, r, f, p, o, s) ((rdev)->asic->set_surface_reg((rdev), (r), (f), (p), (o), (s))) 1711#define radeon_clear_surface_reg(rdev, r) ((rdev)->asic->clear_surface_reg((rdev), (r))) 1712#define radeon_bandwidth_update(rdev) (rdev)->asic->display.bandwidth_update((rdev)) 1713#define radeon_hpd_init(rdev) (rdev)->asic->hpd.init((rdev)) 1714#define radeon_hpd_fini(rdev) (rdev)->asic->hpd.fini((rdev)) 1715#define radeon_hpd_sense(rdev, h) (rdev)->asic->hpd.sense((rdev), (h)) 1716#define radeon_hpd_set_polarity(rdev, h) (rdev)->asic->hpd.set_polarity((rdev), (h)) 1717#define radeon_gui_idle(rdev) (rdev)->asic->gui_idle((rdev)) --- 100 unchanged lines hidden ---

radeon.h (c79a49ca000ebcf4adf5448366284c5c1f25aa20)	radeon.h (798bcf7341cd434f89a4ddd6882ac043b1399825)
1/* 2 * Copyright 2008 Advanced Micro Devices, Inc. 3 * Copyright 2008 Red Hat Inc. 4 * Copyright 2009 Jerome Glisse. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation --- 1174 unchanged lines hidden (view full) --- 1183 uint64_t src_offset, 1184 uint64_t dst_offset, 1185 unsigned num_gpu_pages, 1186 struct radeon_fence fence); 1187 / ring used for bo copies */ 1188 u32 copy_ring_index; 1189 } copy; 1190	1/* 2 * Copyright 2008 Advanced Micro Devices, Inc. 3 * Copyright 2008 Red Hat Inc. 4 * Copyright 2009 Jerome Glisse. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation --- 1174 unchanged lines hidden (view full) --- 1183 uint64_t src_offset, 1184 uint64_t dst_offset, 1185 unsigned num_gpu_pages, 1186 struct radeon_fence fence); 1187 / ring used for bo copies */ 1188 u32 copy_ring_index; 1189 } copy; 1190
1191 uint32_t (get_engine_clock)(struct radeon_device rdev); 1192 void (set_engine_clock)(struct radeon_device rdev, uint32_t eng_clock); 1193 uint32_t (get_memory_clock)(struct radeon_device rdev); 1194 void (set_memory_clock)(struct radeon_device rdev, uint32_t mem_clock); 1195 int (get_pcie_lanes)(struct radeon_device rdev); 1196 void (set_pcie_lanes)(struct radeon_device rdev, int lanes); 1197 void (set_clock_gating)(struct radeon_device rdev, int enable);
1198 int (set_surface_reg)(struct radeon_device rdev, int reg, 1199 uint32_t tiling_flags, uint32_t pitch, 1200 uint32_t offset, uint32_t obj_size); 1201 void (clear_surface_reg)(struct radeon_device rdev, int reg); 1202 1203 struct { 1204 void (init)(struct radeon_device rdev); 1205 void (fini)(struct radeon_device rdev); --- 12 unchanged lines hidden (view full) --- 1218 bool (gui_idle)(struct radeon_device rdev); 1219 /* power management / 1220 struct { 1221 void (misc)(struct radeon_device rdev); 1222 void (prepare)(struct radeon_device rdev); 1223 void (finish)(struct radeon_device rdev); 1224 void (init_profile)(struct radeon_device rdev); 1225 void (get_dynpm_state)(struct radeon_device *rdev);	1191 int (set_surface_reg)(struct radeon_device rdev, int reg, 1192 uint32_t tiling_flags, uint32_t pitch, 1193 uint32_t offset, uint32_t obj_size); 1194 void (clear_surface_reg)(struct radeon_device rdev, int reg); 1195 1196 struct { 1197 void (init)(struct radeon_device rdev); 1198 void (fini)(struct radeon_device rdev); --- 12 unchanged lines hidden (view full) --- 1211 bool (gui_idle)(struct radeon_device rdev); 1212 /* power management / 1213 struct { 1214 void (misc)(struct radeon_device rdev); 1215 void (prepare)(struct radeon_device rdev); 1216 void (finish)(struct radeon_device rdev); 1217 void (init_profile)(struct radeon_device rdev); 1218 void (get_dynpm_state)(struct radeon_device *rdev);
	1219 uint32_t (get_engine_clock)(struct radeon_device rdev); 1220 void (set_engine_clock)(struct radeon_device rdev, uint32_t eng_clock); 1221 uint32_t (get_memory_clock)(struct radeon_device rdev); 1222 void (set_memory_clock)(struct radeon_device rdev, uint32_t mem_clock); 1223 int (get_pcie_lanes)(struct radeon_device rdev); 1224 void (set_pcie_lanes)(struct radeon_device rdev, int lanes); 1225 void (set_clock_gating)(struct radeon_device rdev, int enable);
1226 } pm; 1227 /* pageflipping / 1228 struct { 1229 void (pre_page_flip)(struct radeon_device rdev, int crtc); 1230 u32 (page_flip)(struct radeon_device rdev, int crtc, u64 crtc_base); 1231 void (post_page_flip)(struct radeon_device rdev, int crtc); 1232 } pflip; 1233 --- 461 unchanged lines hidden* (view full) --- 1695#define radeon_fence_ring_emit(rdev, r, fence) (rdev)->asic->ring[(r)].emit_fence((rdev), (fence)) 1696#define radeon_semaphore_ring_emit(rdev, r, cp, semaphore, emit_wait) (rdev)->asic->ring[(r)].emit_semaphore((rdev), (cp), (semaphore), (emit_wait)) 1697#define radeon_copy_blit(rdev, s, d, np, f) (rdev)->asic->copy.blit((rdev), (s), (d), (np), (f)) 1698#define radeon_copy_dma(rdev, s, d, np, f) (rdev)->asic->copy.dma((rdev), (s), (d), (np), (f)) 1699#define radeon_copy(rdev, s, d, np, f) (rdev)->asic->copy.copy((rdev), (s), (d), (np), (f)) 1700#define radeon_copy_blit_ring_index(rdev) (rdev)->asic->copy.blit_ring_index 1701#define radeon_copy_dma_ring_index(rdev) (rdev)->asic->copy.dma_ring_index 1702#define radeon_copy_ring_index(rdev) (rdev)->asic->copy.copy_ring_index	1226 } pm; 1227 /* pageflipping / 1228 struct { 1229 void (pre_page_flip)(struct radeon_device rdev, int crtc); 1230 u32 (page_flip)(struct radeon_device rdev, int crtc, u64 crtc_base); 1231 void (post_page_flip)(struct radeon_device rdev, int crtc); 1232 } pflip; 1233 --- 461 unchanged lines hidden* (view full) --- 1695#define radeon_fence_ring_emit(rdev, r, fence) (rdev)->asic->ring[(r)].emit_fence((rdev), (fence)) 1696#define radeon_semaphore_ring_emit(rdev, r, cp, semaphore, emit_wait) (rdev)->asic->ring[(r)].emit_semaphore((rdev), (cp), (semaphore), (emit_wait)) 1697#define radeon_copy_blit(rdev, s, d, np, f) (rdev)->asic->copy.blit((rdev), (s), (d), (np), (f)) 1698#define radeon_copy_dma(rdev, s, d, np, f) (rdev)->asic->copy.dma((rdev), (s), (d), (np), (f)) 1699#define radeon_copy(rdev, s, d, np, f) (rdev)->asic->copy.copy((rdev), (s), (d), (np), (f)) 1700#define radeon_copy_blit_ring_index(rdev) (rdev)->asic->copy.blit_ring_index 1701#define radeon_copy_dma_ring_index(rdev) (rdev)->asic->copy.dma_ring_index 1702#define radeon_copy_ring_index(rdev) (rdev)->asic->copy.copy_ring_index
1703#define radeon_get_engine_clock(rdev) (rdev)->asic->get_engine_clock((rdev)) 1704#define radeon_set_engine_clock(rdev, e) (rdev)->asic->set_engine_clock((rdev), (e)) 1705#define radeon_get_memory_clock(rdev) (rdev)->asic->get_memory_clock((rdev)) 1706#define radeon_set_memory_clock(rdev, e) (rdev)->asic->set_memory_clock((rdev), (e)) 1707#define radeon_get_pcie_lanes(rdev) (rdev)->asic->get_pcie_lanes((rdev)) 1708#define radeon_set_pcie_lanes(rdev, l) (rdev)->asic->set_pcie_lanes((rdev), (l)) 1709#define radeon_set_clock_gating(rdev, e) (rdev)->asic->set_clock_gating((rdev), (e))	1703#define radeon_get_engine_clock(rdev) (rdev)->asic->pm.get_engine_clock((rdev)) 1704#define radeon_set_engine_clock(rdev, e) (rdev)->asic->pm.set_engine_clock((rdev), (e)) 1705#define radeon_get_memory_clock(rdev) (rdev)->asic->pm.get_memory_clock((rdev)) 1706#define radeon_set_memory_clock(rdev, e) (rdev)->asic->pm.set_memory_clock((rdev), (e)) 1707#define radeon_get_pcie_lanes(rdev) (rdev)->asic->pm.get_pcie_lanes((rdev)) 1708#define radeon_set_pcie_lanes(rdev, l) (rdev)->asic->pm.set_pcie_lanes((rdev), (l)) 1709#define radeon_set_clock_gating(rdev, e) (rdev)->asic->pm.set_clock_gating((rdev), (e))
1710#define radeon_set_surface_reg(rdev, r, f, p, o, s) ((rdev)->asic->set_surface_reg((rdev), (r), (f), (p), (o), (s))) 1711#define radeon_clear_surface_reg(rdev, r) ((rdev)->asic->clear_surface_reg((rdev), (r))) 1712#define radeon_bandwidth_update(rdev) (rdev)->asic->display.bandwidth_update((rdev)) 1713#define radeon_hpd_init(rdev) (rdev)->asic->hpd.init((rdev)) 1714#define radeon_hpd_fini(rdev) (rdev)->asic->hpd.fini((rdev)) 1715#define radeon_hpd_sense(rdev, h) (rdev)->asic->hpd.sense((rdev), (h)) 1716#define radeon_hpd_set_polarity(rdev, h) (rdev)->asic->hpd.set_polarity((rdev), (h)) 1717#define radeon_gui_idle(rdev) (rdev)->asic->gui_idle((rdev)) --- 100 unchanged lines hidden ---	1710#define radeon_set_surface_reg(rdev, r, f, p, o, s) ((rdev)->asic->set_surface_reg((rdev), (r), (f), (p), (o), (s))) 1711#define radeon_clear_surface_reg(rdev, r) ((rdev)->asic->clear_surface_reg((rdev), (r))) 1712#define radeon_bandwidth_update(rdev) (rdev)->asic->display.bandwidth_update((rdev)) 1713#define radeon_hpd_init(rdev) (rdev)->asic->hpd.init((rdev)) 1714#define radeon_hpd_fini(rdev) (rdev)->asic->hpd.fini((rdev)) 1715#define radeon_hpd_sense(rdev, h) (rdev)->asic->hpd.sense((rdev), (h)) 1716#define radeon_hpd_set_polarity(rdev, h) (rdev)->asic->hpd.set_polarity((rdev), (h)) 1717#define radeon_gui_idle(rdev) (rdev)->asic->gui_idle((rdev)) --- 100 unchanged lines hidden ---