radeon.h (52791eeec1d9f4a7e7fe08aaba0b1553149d93bc) radeon.h (33b3ad3788aba846fc8b9a065fe2685a0b64f713)
1/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation

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614 struct radeon_fence *last_vm_update;
615};
616
617void radeon_sync_create(struct radeon_sync *sync);
618void radeon_sync_fence(struct radeon_sync *sync,
619 struct radeon_fence *fence);
620int radeon_sync_resv(struct radeon_device *rdev,
621 struct radeon_sync *sync,
1/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation

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614 struct radeon_fence *last_vm_update;
615};
616
617void radeon_sync_create(struct radeon_sync *sync);
618void radeon_sync_fence(struct radeon_sync *sync,
619 struct radeon_fence *fence);
620int radeon_sync_resv(struct radeon_device *rdev,
621 struct radeon_sync *sync,
622 struct dma_resv *resv,
622 struct reservation_object *resv,
623 bool shared);
624int radeon_sync_rings(struct radeon_device *rdev,
625 struct radeon_sync *sync,
626 int waiting_ring);
627void radeon_sync_free(struct radeon_device *rdev, struct radeon_sync *sync,
628 struct radeon_fence *fence);
629
630/*

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1907 void (*hdmi_setmode)(struct drm_encoder *encoder, struct drm_display_mode *mode);
1908 } display;
1909 /* copy functions for bo handling */
1910 struct {
1911 struct radeon_fence *(*blit)(struct radeon_device *rdev,
1912 uint64_t src_offset,
1913 uint64_t dst_offset,
1914 unsigned num_gpu_pages,
623 bool shared);
624int radeon_sync_rings(struct radeon_device *rdev,
625 struct radeon_sync *sync,
626 int waiting_ring);
627void radeon_sync_free(struct radeon_device *rdev, struct radeon_sync *sync,
628 struct radeon_fence *fence);
629
630/*

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1907 void (*hdmi_setmode)(struct drm_encoder *encoder, struct drm_display_mode *mode);
1908 } display;
1909 /* copy functions for bo handling */
1910 struct {
1911 struct radeon_fence *(*blit)(struct radeon_device *rdev,
1912 uint64_t src_offset,
1913 uint64_t dst_offset,
1914 unsigned num_gpu_pages,
1915 struct dma_resv *resv);
1915 struct reservation_object *resv);
1916 u32 blit_ring_index;
1917 struct radeon_fence *(*dma)(struct radeon_device *rdev,
1918 uint64_t src_offset,
1919 uint64_t dst_offset,
1920 unsigned num_gpu_pages,
1916 u32 blit_ring_index;
1917 struct radeon_fence *(*dma)(struct radeon_device *rdev,
1918 uint64_t src_offset,
1919 uint64_t dst_offset,
1920 unsigned num_gpu_pages,
1921 struct dma_resv *resv);
1921 struct reservation_object *resv);
1922 u32 dma_ring_index;
1923 /* method used for bo copy */
1924 struct radeon_fence *(*copy)(struct radeon_device *rdev,
1925 uint64_t src_offset,
1926 uint64_t dst_offset,
1927 unsigned num_gpu_pages,
1922 u32 dma_ring_index;
1923 /* method used for bo copy */
1924 struct radeon_fence *(*copy)(struct radeon_device *rdev,
1925 uint64_t src_offset,
1926 uint64_t dst_offset,
1927 unsigned num_gpu_pages,
1928 struct dma_resv *resv);
1928 struct reservation_object *resv);
1929 /* ring used for bo copies */
1930 u32 copy_ring_index;
1931 } copy;
1932 /* surfaces */
1933 struct {
1934 int (*set_reg)(struct radeon_device *rdev, int reg,
1935 uint32_t tiling_flags, uint32_t pitch,
1936 uint32_t offset, uint32_t obj_size);

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2381 struct radeon_gem gem;
2382 struct radeon_pm pm;
2383 struct radeon_uvd uvd;
2384 struct radeon_vce vce;
2385 uint32_t bios_scratch[RADEON_BIOS_NUM_SCRATCH];
2386 struct radeon_wb wb;
2387 struct radeon_dummy_page dummy_page;
2388 bool shutdown;
1929 /* ring used for bo copies */
1930 u32 copy_ring_index;
1931 } copy;
1932 /* surfaces */
1933 struct {
1934 int (*set_reg)(struct radeon_device *rdev, int reg,
1935 uint32_t tiling_flags, uint32_t pitch,
1936 uint32_t offset, uint32_t obj_size);

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2381 struct radeon_gem gem;
2382 struct radeon_pm pm;
2383 struct radeon_uvd uvd;
2384 struct radeon_vce vce;
2385 uint32_t bios_scratch[RADEON_BIOS_NUM_SCRATCH];
2386 struct radeon_wb wb;
2387 struct radeon_dummy_page dummy_page;
2388 bool shutdown;
2389 bool need_dma32;
2390 bool need_swiotlb;
2391 bool accel_working;
2392 bool fastfb_working; /* IGP feature*/
2393 bool needs_reset, in_reset;
2394 struct radeon_surface_reg surface_regs[RADEON_GEM_MAX_SURFACES];
2395 const struct firmware *me_fw; /* all family ME firmware */
2396 const struct firmware *pfp_fw; /* r6/700 PFP firmware */
2397 const struct firmware *rlc_fw; /* r6/700 RLC firmware */

--- 569 unchanged lines hidden --- 		2389 bool need_swiotlb;
2390 bool accel_working;
2391 bool fastfb_working; /* IGP feature*/
2392 bool needs_reset, in_reset;
2393 struct radeon_surface_reg surface_regs[RADEON_GEM_MAX_SURFACES];
2394 const struct firmware *me_fw; /* all family ME firmware */
2395 const struct firmware *pfp_fw; /* r6/700 PFP firmware */
2396 const struct firmware *rlc_fw; /* r6/700 RLC firmware */

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