r200.c (336879b1da97fffc097f77c6d6f818660f2826f0) r200.c (57d20a43c9b30663bdbacde8294a902edef35a84)
1/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation

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75 vtx_size++;
76 if (vtx_fmt_0 & R200_VTX_W1)
77 vtx_size++;
78 if (vtx_fmt_0 & R200_VTX_N1)
79 vtx_size += 3;
80 return vtx_size;
81}
82
1/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation

--- 66 unchanged lines hidden (view full) ---

75 vtx_size++;
76 if (vtx_fmt_0 & R200_VTX_W1)
77 vtx_size++;
78 if (vtx_fmt_0 & R200_VTX_N1)
79 vtx_size += 3;
80 return vtx_size;
81}
82
83int r200_copy_dma(struct radeon_device *rdev,
84 uint64_t src_offset,
85 uint64_t dst_offset,
86 unsigned num_gpu_pages,
87 struct radeon_fence **fence)
83struct radeon_fence *r200_copy_dma(struct radeon_device *rdev,
84 uint64_t src_offset,
85 uint64_t dst_offset,
86 unsigned num_gpu_pages,
87 struct reservation_object *resv)
88{
89 struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX];
88{
89 struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX];
90 struct radeon_fence *fence;
90 uint32_t size;
91 uint32_t cur_size;
92 int i, num_loops;
93 int r = 0;
94
95 /* radeon pitch is /64 */
96 size = num_gpu_pages << RADEON_GPU_PAGE_SHIFT;
97 num_loops = DIV_ROUND_UP(size, 0x1FFFFF);
98 r = radeon_ring_lock(rdev, ring, num_loops * 4 + 64);
99 if (r) {
100 DRM_ERROR("radeon: moving bo (%d).\n", r);
91 uint32_t size;
92 uint32_t cur_size;
93 int i, num_loops;
94 int r = 0;
95
96 /* radeon pitch is /64 */
97 size = num_gpu_pages << RADEON_GPU_PAGE_SHIFT;
98 num_loops = DIV_ROUND_UP(size, 0x1FFFFF);
99 r = radeon_ring_lock(rdev, ring, num_loops * 4 + 64);
100 if (r) {
101 DRM_ERROR("radeon: moving bo (%d).\n", r);
101 return r;
102 return ERR_PTR(r);
102 }
103 /* Must wait for 2D idle & clean before DMA or hangs might happen */
104 radeon_ring_write(ring, PACKET0(RADEON_WAIT_UNTIL, 0));
105 radeon_ring_write(ring, (1 << 16));
106 for (i = 0; i < num_loops; i++) {
107 cur_size = size;
108 if (cur_size > 0x1FFFFF) {
109 cur_size = 0x1FFFFF;
110 }
111 size -= cur_size;
112 radeon_ring_write(ring, PACKET0(0x720, 2));
113 radeon_ring_write(ring, src_offset);
114 radeon_ring_write(ring, dst_offset);
115 radeon_ring_write(ring, cur_size | (1 << 31) | (1 << 30));
116 src_offset += cur_size;
117 dst_offset += cur_size;
118 }
119 radeon_ring_write(ring, PACKET0(RADEON_WAIT_UNTIL, 0));
120 radeon_ring_write(ring, RADEON_WAIT_DMA_GUI_IDLE);
103 }
104 /* Must wait for 2D idle & clean before DMA or hangs might happen */
105 radeon_ring_write(ring, PACKET0(RADEON_WAIT_UNTIL, 0));
106 radeon_ring_write(ring, (1 << 16));
107 for (i = 0; i < num_loops; i++) {
108 cur_size = size;
109 if (cur_size > 0x1FFFFF) {
110 cur_size = 0x1FFFFF;
111 }
112 size -= cur_size;
113 radeon_ring_write(ring, PACKET0(0x720, 2));
114 radeon_ring_write(ring, src_offset);
115 radeon_ring_write(ring, dst_offset);
116 radeon_ring_write(ring, cur_size | (1 << 31) | (1 << 30));
117 src_offset += cur_size;
118 dst_offset += cur_size;
119 }
120 radeon_ring_write(ring, PACKET0(RADEON_WAIT_UNTIL, 0));
121 radeon_ring_write(ring, RADEON_WAIT_DMA_GUI_IDLE);
121 if (fence) {
122 r = radeon_fence_emit(rdev, fence, RADEON_RING_TYPE_GFX_INDEX);
122 r = radeon_fence_emit(rdev, &fence, RADEON_RING_TYPE_GFX_INDEX);
123 if (r) {
124 radeon_ring_unlock_undo(rdev, ring);
125 return ERR_PTR(r);
123 }
124 radeon_ring_unlock_commit(rdev, ring, false);
126 }
127 radeon_ring_unlock_commit(rdev, ring, false);
125 return r;
128 return fence;
126}
127
128
129static int r200_get_vtx_size_1(uint32_t vtx_fmt_1)
130{
131 int vtx_size, i, tex_size;
132 vtx_size = 0;
133 for (i = 0; i < 6; i++) {

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130
131
132static int r200_get_vtx_size_1(uint32_t vtx_fmt_1)
133{
134 int vtx_size, i, tex_size;
135 vtx_size = 0;
136 for (i = 0; i < 6; i++) {

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