r100.c (c7eff978e0868ccad1ecbefcc342f6709f9f4789) r100.c (48ef779ff32561c2ed780808fcd0ab4633df22bd)
1/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation

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60MODULE_FIRMWARE(FIRMWARE_R300);
61MODULE_FIRMWARE(FIRMWARE_R420);
62MODULE_FIRMWARE(FIRMWARE_RS690);
63MODULE_FIRMWARE(FIRMWARE_RS600);
64MODULE_FIRMWARE(FIRMWARE_R520);
65
66#include "r100_track.h"
67
1/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation

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60MODULE_FIRMWARE(FIRMWARE_R300);
61MODULE_FIRMWARE(FIRMWARE_R420);
62MODULE_FIRMWARE(FIRMWARE_RS690);
63MODULE_FIRMWARE(FIRMWARE_RS600);
64MODULE_FIRMWARE(FIRMWARE_R520);
65
66#include "r100_track.h"
67
68/* This files gather functions specifics to:
69 * r100,rv100,rs100,rv200,rs200,r200,rv250,rs300,rv280
70 * and others in some cases.
71 */
72
73/**
74 * r100_wait_for_vblank - vblank wait asic callback.
75 *
76 * @rdev: radeon_device pointer
77 * @crtc: crtc to wait for vblank on
78 *
79 * Wait for vblank on the requested crtc (r1xx-r4xx).
80 */
68void r100_wait_for_vblank(struct radeon_device *rdev, int crtc)
69{
70 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc];
71 int i;
72
73 if (radeon_crtc->crtc_id == 0) {
74 if (RREG32(RADEON_CRTC_GEN_CNTL) & RADEON_CRTC_EN) {
75 for (i = 0; i < rdev->usec_timeout; i++) {

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94 if (RREG32(RADEON_CRTC2_STATUS) & RADEON_CRTC2_VBLANK_CUR)
95 break;
96 udelay(1);
97 }
98 }
99 }
100}
101
81void r100_wait_for_vblank(struct radeon_device *rdev, int crtc)
82{
83 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc];
84 int i;
85
86 if (radeon_crtc->crtc_id == 0) {
87 if (RREG32(RADEON_CRTC_GEN_CNTL) & RADEON_CRTC_EN) {
88 for (i = 0; i < rdev->usec_timeout; i++) {

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107 if (RREG32(RADEON_CRTC2_STATUS) & RADEON_CRTC2_VBLANK_CUR)
108 break;
109 udelay(1);
110 }
111 }
112 }
113}
114
102/* This files gather functions specifics to:
103 * r100,rv100,rs100,rv200,rs200,r200,rv250,rs300,rv280
115/**
116 * r100_pre_page_flip - pre-pageflip callback.
117 *
118 * @rdev: radeon_device pointer
119 * @crtc: crtc to prepare for pageflip on
120 *
121 * Pre-pageflip callback (r1xx-r4xx).
122 * Enables the pageflip irq (vblank irq).
104 */
123 */
105
106void r100_pre_page_flip(struct radeon_device *rdev, int crtc)
107{
108 /* enable the pflip int */
109 radeon_irq_kms_pflip_irq_get(rdev, crtc);
110}
111
124void r100_pre_page_flip(struct radeon_device *rdev, int crtc)
125{
126 /* enable the pflip int */
127 radeon_irq_kms_pflip_irq_get(rdev, crtc);
128}
129
130/**
131 * r100_post_page_flip - pos-pageflip callback.
132 *
133 * @rdev: radeon_device pointer
134 * @crtc: crtc to cleanup pageflip on
135 *
136 * Post-pageflip callback (r1xx-r4xx).
137 * Disables the pageflip irq (vblank irq).
138 */
112void r100_post_page_flip(struct radeon_device *rdev, int crtc)
113{
114 /* disable the pflip int */
115 radeon_irq_kms_pflip_irq_put(rdev, crtc);
116}
117
139void r100_post_page_flip(struct radeon_device *rdev, int crtc)
140{
141 /* disable the pflip int */
142 radeon_irq_kms_pflip_irq_put(rdev, crtc);
143}
144
145/**
146 * r100_page_flip - pageflip callback.
147 *
148 * @rdev: radeon_device pointer
149 * @crtc_id: crtc to cleanup pageflip on
150 * @crtc_base: new address of the crtc (GPU MC address)
151 *
152 * Does the actual pageflip (r1xx-r4xx).
153 * During vblank we take the crtc lock and wait for the update_pending
154 * bit to go high, when it does, we release the lock, and allow the
155 * double buffered update to take place.
156 * Returns the current update pending status.
157 */
118u32 r100_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base)
119{
120 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id];
121 u32 tmp = ((u32)crtc_base) | RADEON_CRTC_OFFSET__OFFSET_LOCK;
122 int i;
123
124 /* Lock the graphics update lock */
125 /* update the scanout addresses */

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136 /* Unlock the lock, so double-buffering can take place inside vblank */
137 tmp &= ~RADEON_CRTC_OFFSET__OFFSET_LOCK;
138 WREG32(RADEON_CRTC_OFFSET + radeon_crtc->crtc_offset, tmp);
139
140 /* Return current update_pending status: */
141 return RREG32(RADEON_CRTC_OFFSET + radeon_crtc->crtc_offset) & RADEON_CRTC_OFFSET__GUI_TRIG_OFFSET;
142}
143
158u32 r100_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base)
159{
160 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id];
161 u32 tmp = ((u32)crtc_base) | RADEON_CRTC_OFFSET__OFFSET_LOCK;
162 int i;
163
164 /* Lock the graphics update lock */
165 /* update the scanout addresses */

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176 /* Unlock the lock, so double-buffering can take place inside vblank */
177 tmp &= ~RADEON_CRTC_OFFSET__OFFSET_LOCK;
178 WREG32(RADEON_CRTC_OFFSET + radeon_crtc->crtc_offset, tmp);
179
180 /* Return current update_pending status: */
181 return RREG32(RADEON_CRTC_OFFSET + radeon_crtc->crtc_offset) & RADEON_CRTC_OFFSET__GUI_TRIG_OFFSET;
182}
183
184/**
185 * r100_pm_get_dynpm_state - look up dynpm power state callback.
186 *
187 * @rdev: radeon_device pointer
188 *
189 * Look up the optimal power state based on the
190 * current state of the GPU (r1xx-r5xx).
191 * Used for dynpm only.
192 */
144void r100_pm_get_dynpm_state(struct radeon_device *rdev)
145{
146 int i;
147 rdev->pm.dynpm_can_upclock = true;
148 rdev->pm.dynpm_can_downclock = true;
149
150 switch (rdev->pm.dynpm_planned_action) {
151 case DYNPM_ACTION_MINIMUM:

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218 rdev->pm.power_state[rdev->pm.requested_power_state_index].
219 clock_info[rdev->pm.requested_clock_mode_index].sclk,
220 rdev->pm.power_state[rdev->pm.requested_power_state_index].
221 clock_info[rdev->pm.requested_clock_mode_index].mclk,
222 rdev->pm.power_state[rdev->pm.requested_power_state_index].
223 pcie_lanes);
224}
225
193void r100_pm_get_dynpm_state(struct radeon_device *rdev)
194{
195 int i;
196 rdev->pm.dynpm_can_upclock = true;
197 rdev->pm.dynpm_can_downclock = true;
198
199 switch (rdev->pm.dynpm_planned_action) {
200 case DYNPM_ACTION_MINIMUM:

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267 rdev->pm.power_state[rdev->pm.requested_power_state_index].
268 clock_info[rdev->pm.requested_clock_mode_index].sclk,
269 rdev->pm.power_state[rdev->pm.requested_power_state_index].
270 clock_info[rdev->pm.requested_clock_mode_index].mclk,
271 rdev->pm.power_state[rdev->pm.requested_power_state_index].
272 pcie_lanes);
273}
274
275/**
276 * r100_pm_init_profile - Initialize power profiles callback.
277 *
278 * @rdev: radeon_device pointer
279 *
280 * Initialize the power states used in profile mode
281 * (r1xx-r3xx).
282 * Used for profile mode only.
283 */
226void r100_pm_init_profile(struct radeon_device *rdev)
227{
228 /* default */
229 rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_off_ps_idx = rdev->pm.default_power_state_index;
230 rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index;
231 rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_off_cm_idx = 0;
232 rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_on_cm_idx = 0;
233 /* low sh */

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257 rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_cm_idx = 0;
258 /* high mh */
259 rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx = 0;
260 rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index;
261 rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_cm_idx = 0;
262 rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_cm_idx = 0;
263}
264
284void r100_pm_init_profile(struct radeon_device *rdev)
285{
286 /* default */
287 rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_off_ps_idx = rdev->pm.default_power_state_index;
288 rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index;
289 rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_off_cm_idx = 0;
290 rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_on_cm_idx = 0;
291 /* low sh */

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315 rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_cm_idx = 0;
316 /* high mh */
317 rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx = 0;
318 rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index;
319 rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_cm_idx = 0;
320 rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_cm_idx = 0;
321}
322
323/**
324 * r100_pm_misc - set additional pm hw parameters callback.
325 *
326 * @rdev: radeon_device pointer
327 *
328 * Set non-clock parameters associated with a power state
329 * (voltage, pcie lanes, etc.) (r1xx-r4xx).
330 */
265void r100_pm_misc(struct radeon_device *rdev)
266{
267 int requested_index = rdev->pm.requested_power_state_index;
268 struct radeon_power_state *ps = &rdev->pm.power_state[requested_index];
269 struct radeon_voltage *voltage = &ps->clock_info[0].voltage;
270 u32 tmp, sclk_cntl, sclk_cntl2, sclk_more_cntl;
271
272 if ((voltage->type == VOLTAGE_GPIO) && (voltage->gpio.valid)) {

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348 (ps->pcie_lanes !=
349 rdev->pm.power_state[rdev->pm.current_power_state_index].pcie_lanes)) {
350 radeon_set_pcie_lanes(rdev,
351 ps->pcie_lanes);
352 DRM_DEBUG_DRIVER("Setting: p: %d\n", ps->pcie_lanes);
353 }
354}
355
331void r100_pm_misc(struct radeon_device *rdev)
332{
333 int requested_index = rdev->pm.requested_power_state_index;
334 struct radeon_power_state *ps = &rdev->pm.power_state[requested_index];
335 struct radeon_voltage *voltage = &ps->clock_info[0].voltage;
336 u32 tmp, sclk_cntl, sclk_cntl2, sclk_more_cntl;
337
338 if ((voltage->type == VOLTAGE_GPIO) && (voltage->gpio.valid)) {

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414 (ps->pcie_lanes !=
415 rdev->pm.power_state[rdev->pm.current_power_state_index].pcie_lanes)) {
416 radeon_set_pcie_lanes(rdev,
417 ps->pcie_lanes);
418 DRM_DEBUG_DRIVER("Setting: p: %d\n", ps->pcie_lanes);
419 }
420}
421
422/**
423 * r100_pm_prepare - pre-power state change callback.
424 *
425 * @rdev: radeon_device pointer
426 *
427 * Prepare for a power state change (r1xx-r4xx).
428 */
356void r100_pm_prepare(struct radeon_device *rdev)
357{
358 struct drm_device *ddev = rdev->ddev;
359 struct drm_crtc *crtc;
360 struct radeon_crtc *radeon_crtc;
361 u32 tmp;
362
363 /* disable any active CRTCs */

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372 tmp = RREG32(RADEON_CRTC_GEN_CNTL);
373 tmp |= RADEON_CRTC_DISP_REQ_EN_B;
374 WREG32(RADEON_CRTC_GEN_CNTL, tmp);
375 }
376 }
377 }
378}
379
429void r100_pm_prepare(struct radeon_device *rdev)
430{
431 struct drm_device *ddev = rdev->ddev;
432 struct drm_crtc *crtc;
433 struct radeon_crtc *radeon_crtc;
434 u32 tmp;
435
436 /* disable any active CRTCs */

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445 tmp = RREG32(RADEON_CRTC_GEN_CNTL);
446 tmp |= RADEON_CRTC_DISP_REQ_EN_B;
447 WREG32(RADEON_CRTC_GEN_CNTL, tmp);
448 }
449 }
450 }
451}
452
453/**
454 * r100_pm_finish - post-power state change callback.
455 *
456 * @rdev: radeon_device pointer
457 *
458 * Clean up after a power state change (r1xx-r4xx).
459 */
380void r100_pm_finish(struct radeon_device *rdev)
381{
382 struct drm_device *ddev = rdev->ddev;
383 struct drm_crtc *crtc;
384 struct radeon_crtc *radeon_crtc;
385 u32 tmp;
386
387 /* enable any active CRTCs */

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396 tmp = RREG32(RADEON_CRTC_GEN_CNTL);
397 tmp &= ~RADEON_CRTC_DISP_REQ_EN_B;
398 WREG32(RADEON_CRTC_GEN_CNTL, tmp);
399 }
400 }
401 }
402}
403
460void r100_pm_finish(struct radeon_device *rdev)
461{
462 struct drm_device *ddev = rdev->ddev;
463 struct drm_crtc *crtc;
464 struct radeon_crtc *radeon_crtc;
465 u32 tmp;
466
467 /* enable any active CRTCs */

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476 tmp = RREG32(RADEON_CRTC_GEN_CNTL);
477 tmp &= ~RADEON_CRTC_DISP_REQ_EN_B;
478 WREG32(RADEON_CRTC_GEN_CNTL, tmp);
479 }
480 }
481 }
482}
483
484/**
485 * r100_gui_idle - gui idle callback.
486 *
487 * @rdev: radeon_device pointer
488 *
489 * Check of the GUI (2D/3D engines) are idle (r1xx-r5xx).
490 * Returns true if idle, false if not.
491 */
404bool r100_gui_idle(struct radeon_device *rdev)
405{
406 if (RREG32(RADEON_RBBM_STATUS) & RADEON_RBBM_ACTIVE)
407 return false;
408 else
409 return true;
410}
411
412/* hpd for digital panel detect/disconnect */
492bool r100_gui_idle(struct radeon_device *rdev)
493{
494 if (RREG32(RADEON_RBBM_STATUS) & RADEON_RBBM_ACTIVE)
495 return false;
496 else
497 return true;
498}
499
500/* hpd for digital panel detect/disconnect */
501/**
502 * r100_hpd_sense - hpd sense callback.
503 *
504 * @rdev: radeon_device pointer
505 * @hpd: hpd (hotplug detect) pin
506 *
507 * Checks if a digital monitor is connected (r1xx-r4xx).
508 * Returns true if connected, false if not connected.
509 */
413bool r100_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd)
414{
415 bool connected = false;
416
417 switch (hpd) {
418 case RADEON_HPD_1:
419 if (RREG32(RADEON_FP_GEN_CNTL) & RADEON_FP_DETECT_SENSE)
420 connected = true;
421 break;
422 case RADEON_HPD_2:
423 if (RREG32(RADEON_FP2_GEN_CNTL) & RADEON_FP2_DETECT_SENSE)
424 connected = true;
425 break;
426 default:
427 break;
428 }
429 return connected;
430}
431
510bool r100_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd)
511{
512 bool connected = false;
513
514 switch (hpd) {
515 case RADEON_HPD_1:
516 if (RREG32(RADEON_FP_GEN_CNTL) & RADEON_FP_DETECT_SENSE)
517 connected = true;
518 break;
519 case RADEON_HPD_2:
520 if (RREG32(RADEON_FP2_GEN_CNTL) & RADEON_FP2_DETECT_SENSE)
521 connected = true;
522 break;
523 default:
524 break;
525 }
526 return connected;
527}
528
529/**
530 * r100_hpd_set_polarity - hpd set polarity callback.
531 *
532 * @rdev: radeon_device pointer
533 * @hpd: hpd (hotplug detect) pin
534 *
535 * Set the polarity of the hpd pin (r1xx-r4xx).
536 */
432void r100_hpd_set_polarity(struct radeon_device *rdev,
433 enum radeon_hpd_id hpd)
434{
435 u32 tmp;
436 bool connected = r100_hpd_sense(rdev, hpd);
437
438 switch (hpd) {
439 case RADEON_HPD_1:

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452 tmp |= RADEON_FP2_DETECT_INT_POL;
453 WREG32(RADEON_FP2_GEN_CNTL, tmp);
454 break;
455 default:
456 break;
457 }
458}
459
537void r100_hpd_set_polarity(struct radeon_device *rdev,
538 enum radeon_hpd_id hpd)
539{
540 u32 tmp;
541 bool connected = r100_hpd_sense(rdev, hpd);
542
543 switch (hpd) {
544 case RADEON_HPD_1:

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557 tmp |= RADEON_FP2_DETECT_INT_POL;
558 WREG32(RADEON_FP2_GEN_CNTL, tmp);
559 break;
560 default:
561 break;
562 }
563}
564
565/**
566 * r100_hpd_init - hpd setup callback.
567 *
568 * @rdev: radeon_device pointer
569 *
570 * Setup the hpd pins used by the card (r1xx-r4xx).
571 * Set the polarity, and enable the hpd interrupts.
572 */
460void r100_hpd_init(struct radeon_device *rdev)
461{
462 struct drm_device *dev = rdev->ddev;
463 struct drm_connector *connector;
464 unsigned enable = 0;
465
466 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
467 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
468 enable |= 1 << radeon_connector->hpd.hpd;
469 radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd);
470 }
471 radeon_irq_kms_enable_hpd(rdev, enable);
472}
473
573void r100_hpd_init(struct radeon_device *rdev)
574{
575 struct drm_device *dev = rdev->ddev;
576 struct drm_connector *connector;
577 unsigned enable = 0;
578
579 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
580 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
581 enable |= 1 << radeon_connector->hpd.hpd;
582 radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd);
583 }
584 radeon_irq_kms_enable_hpd(rdev, enable);
585}
586
587/**
588 * r100_hpd_fini - hpd tear down callback.
589 *
590 * @rdev: radeon_device pointer
591 *
592 * Tear down the hpd pins used by the card (r1xx-r4xx).
593 * Disable the hpd interrupts.
594 */
474void r100_hpd_fini(struct radeon_device *rdev)
475{
476 struct drm_device *dev = rdev->ddev;
477 struct drm_connector *connector;
478 unsigned disable = 0;
479
480 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
481 struct radeon_connector *radeon_connector = to_radeon_connector(connector);

--- 3632 unchanged lines hidden --- 		595void r100_hpd_fini(struct radeon_device *rdev)
596{
597 struct drm_device *dev = rdev->ddev;
598 struct drm_connector *connector;
599 unsigned disable = 0;
600
601 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
602 struct radeon_connector *radeon_connector = to_radeon_connector(connector);

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