r100.c (336879b1da97fffc097f77c6d6f818660f2826f0) r100.c (57d20a43c9b30663bdbacde8294a902edef35a84)
1/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation

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850 struct radeon_semaphore *semaphore,
851 bool emit_wait)
852{
853 /* Unused on older asics, since we don't have semaphores or multiple rings */
854 BUG();
855 return false;
856}
857
1/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation

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850 struct radeon_semaphore *semaphore,
851 bool emit_wait)
852{
853 /* Unused on older asics, since we don't have semaphores or multiple rings */
854 BUG();
855 return false;
856}
857
858int r100_copy_blit(struct radeon_device *rdev,
859 uint64_t src_offset,
860 uint64_t dst_offset,
861 unsigned num_gpu_pages,
862 struct radeon_fence **fence)
858struct radeon_fence *r100_copy_blit(struct radeon_device *rdev,
859 uint64_t src_offset,
860 uint64_t dst_offset,
861 unsigned num_gpu_pages,
862 struct reservation_object *resv)
863{
864 struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX];
863{
864 struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX];
865 struct radeon_fence *fence;
865 uint32_t cur_pages;
866 uint32_t stride_bytes = RADEON_GPU_PAGE_SIZE;
867 uint32_t pitch;
868 uint32_t stride_pixels;
869 unsigned ndw;
870 int num_loops;
871 int r = 0;
872

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877 stride_pixels = stride_bytes / 4;
878 num_loops = DIV_ROUND_UP(num_gpu_pages, 8191);
879
880 /* Ask for enough room for blit + flush + fence */
881 ndw = 64 + (10 * num_loops);
882 r = radeon_ring_lock(rdev, ring, ndw);
883 if (r) {
884 DRM_ERROR("radeon: moving bo (%d) asking for %u dw.\n", r, ndw);
866 uint32_t cur_pages;
867 uint32_t stride_bytes = RADEON_GPU_PAGE_SIZE;
868 uint32_t pitch;
869 uint32_t stride_pixels;
870 unsigned ndw;
871 int num_loops;
872 int r = 0;
873

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878 stride_pixels = stride_bytes / 4;
879 num_loops = DIV_ROUND_UP(num_gpu_pages, 8191);
880
881 /* Ask for enough room for blit + flush + fence */
882 ndw = 64 + (10 * num_loops);
883 r = radeon_ring_lock(rdev, ring, ndw);
884 if (r) {
885 DRM_ERROR("radeon: moving bo (%d) asking for %u dw.\n", r, ndw);
885 return -EINVAL;
886 return ERR_PTR(-EINVAL);
886 }
887 while (num_gpu_pages > 0) {
888 cur_pages = num_gpu_pages;
889 if (cur_pages > 8191) {
890 cur_pages = 8191;
891 }
892 num_gpu_pages -= cur_pages;
893

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917 }
918 radeon_ring_write(ring, PACKET0(RADEON_DSTCACHE_CTLSTAT, 0));
919 radeon_ring_write(ring, RADEON_RB2D_DC_FLUSH_ALL);
920 radeon_ring_write(ring, PACKET0(RADEON_WAIT_UNTIL, 0));
921 radeon_ring_write(ring,
922 RADEON_WAIT_2D_IDLECLEAN |
923 RADEON_WAIT_HOST_IDLECLEAN |
924 RADEON_WAIT_DMA_GUI_IDLE);
887 }
888 while (num_gpu_pages > 0) {
889 cur_pages = num_gpu_pages;
890 if (cur_pages > 8191) {
891 cur_pages = 8191;
892 }
893 num_gpu_pages -= cur_pages;
894

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918 }
919 radeon_ring_write(ring, PACKET0(RADEON_DSTCACHE_CTLSTAT, 0));
920 radeon_ring_write(ring, RADEON_RB2D_DC_FLUSH_ALL);
921 radeon_ring_write(ring, PACKET0(RADEON_WAIT_UNTIL, 0));
922 radeon_ring_write(ring,
923 RADEON_WAIT_2D_IDLECLEAN |
924 RADEON_WAIT_HOST_IDLECLEAN |
925 RADEON_WAIT_DMA_GUI_IDLE);
925 if (fence) {
926 r = radeon_fence_emit(rdev, fence, RADEON_RING_TYPE_GFX_INDEX);
926 r = radeon_fence_emit(rdev, &fence, RADEON_RING_TYPE_GFX_INDEX);
927 if (r) {
928 radeon_ring_unlock_undo(rdev, ring);
929 return ERR_PTR(r);
927 }
928 radeon_ring_unlock_commit(rdev, ring, false);
930 }
931 radeon_ring_unlock_commit(rdev, ring, false);
929 return r;
932 return fence;
930}
931
932static int r100_cp_wait_for_idle(struct radeon_device *rdev)
933{
934 unsigned i;
935 u32 tmp;
936
937 for (i = 0; i < rdev->usec_timeout; i++) {

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934
935static int r100_cp_wait_for_idle(struct radeon_device *rdev)
936{
937 unsigned i;
938 u32 tmp;
939
940 for (i = 0; i < rdev->usec_timeout; i++) {

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