dac.c (db2bec187dd68e79d512112df1f6e7a849e7f0ce) dac.c (967e7bde8739fe3b215f7537e8f1f39c044902af)
1/*
2 * Copyright 2003 NVIDIA, Corporation
3 * Copyright 2006 Dave Airlie
4 * Copyright 2007 Maarten Maathuis
5 * Copyright 2007-2009 Stuart Bennett
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),

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60/*
61 * arbitrary limit to number of conflicting sample pairs to tolerate at a
62 * voltage step (observed to be at least 5 in "nvidia")
63 */
64#define MAX_SAMPLE_PAIRS 10
65
66static int sample_load_twice(struct drm_device *dev, bool sense[2])
67{
1/*
2 * Copyright 2003 NVIDIA, Corporation
3 * Copyright 2006 Dave Airlie
4 * Copyright 2007 Maarten Maathuis
5 * Copyright 2007-2009 Stuart Bennett
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),

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60/*
61 * arbitrary limit to number of conflicting sample pairs to tolerate at a
62 * voltage step (observed to be at least 5 in "nvidia")
63 */
64#define MAX_SAMPLE_PAIRS 10
65
66static int sample_load_twice(struct drm_device *dev, bool sense[2])
67{
68 struct nouveau_object *device = nouveau_drm(dev)->device;
69 struct nouveau_timer *ptimer = nouveau_timer(device);
68 struct nvif_device *device = &nouveau_drm(dev)->device;
69 struct nouveau_timer *ptimer = nvkm_timer(device);
70 int i;
71
72 for (i = 0; i < 2; i++) {
73 bool sense_a, sense_b, sense_b_prime;
74 int j = 0;
75
76 /*
77 * wait for bit 0 clear -- out of hblank -- (say reg value 0x4),

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123
124 return 0;
125}
126
127static enum drm_connector_status nv04_dac_detect(struct drm_encoder *encoder,
128 struct drm_connector *connector)
129{
130 struct drm_device *dev = encoder->dev;
70 int i;
71
72 for (i = 0; i < 2; i++) {
73 bool sense_a, sense_b, sense_b_prime;
74 int j = 0;
75
76 /*
77 * wait for bit 0 clear -- out of hblank -- (say reg value 0x4),

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123
124 return 0;
125}
126
127static enum drm_connector_status nv04_dac_detect(struct drm_encoder *encoder,
128 struct drm_connector *connector)
129{
130 struct drm_device *dev = encoder->dev;
131 struct nouveau_object *device = nouveau_drm(dev)->device;
131 struct nvif_device *device = &nouveau_drm(dev)->device;
132 struct nouveau_drm *drm = nouveau_drm(dev);
133 uint8_t saved_seq1, saved_pi, saved_rpc1, saved_cr_mode;
134 uint8_t saved_palette0[3], saved_palette_mask;
135 uint32_t saved_rtest_ctrl, saved_rgen_ctrl;
136 int i;
137 uint8_t blue;
138 bool sense = true;
139

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226
227 return connector_status_disconnected;
228}
229
230uint32_t nv17_dac_sample_load(struct drm_encoder *encoder)
231{
232 struct drm_device *dev = encoder->dev;
233 struct nouveau_drm *drm = nouveau_drm(dev);
132 struct nouveau_drm *drm = nouveau_drm(dev);
133 uint8_t saved_seq1, saved_pi, saved_rpc1, saved_cr_mode;
134 uint8_t saved_palette0[3], saved_palette_mask;
135 uint32_t saved_rtest_ctrl, saved_rgen_ctrl;
136 int i;
137 uint8_t blue;
138 bool sense = true;
139

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226
227 return connector_status_disconnected;
228}
229
230uint32_t nv17_dac_sample_load(struct drm_encoder *encoder)
231{
232 struct drm_device *dev = encoder->dev;
233 struct nouveau_drm *drm = nouveau_drm(dev);
234 struct nouveau_object *device = nouveau_drm(dev)->device;
235 struct nouveau_gpio *gpio = nouveau_gpio(device);
234 struct nvif_device *device = &nouveau_drm(dev)->device;
235 struct nouveau_gpio *gpio = nvkm_gpio(device);
236 struct dcb_output *dcb = nouveau_encoder(encoder)->dcb;
237 uint32_t sample, testval, regoffset = nv04_dac_output_offset(encoder);
238 uint32_t saved_powerctrl_2 = 0, saved_powerctrl_4 = 0, saved_routput,
239 saved_rtest_ctrl, saved_gpio0 = 0, saved_gpio1 = 0, temp, routput;
240 int head;
241
242#define RGB_TEST_DATA(r, g, b) (r << 0 | g << 10 | b << 20)
243 if (dcb->type == DCB_OUTPUT_TV) {

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278
279 /* if there's a spare crtc, using it will minimise flicker */
280 if (!(NVReadVgaCrtc(dev, head, NV_CIO_CRE_RPC1_INDEX) & 0xC0))
281 head ^= 1;
282
283 /* nv driver and nv31 use 0xfffffeee, nv34 and 6600 use 0xfffffece */
284 routput = (saved_routput & 0xfffffece) | head << 8;
285
236 struct dcb_output *dcb = nouveau_encoder(encoder)->dcb;
237 uint32_t sample, testval, regoffset = nv04_dac_output_offset(encoder);
238 uint32_t saved_powerctrl_2 = 0, saved_powerctrl_4 = 0, saved_routput,
239 saved_rtest_ctrl, saved_gpio0 = 0, saved_gpio1 = 0, temp, routput;
240 int head;
241
242#define RGB_TEST_DATA(r, g, b) (r << 0 | g << 10 | b << 20)
243 if (dcb->type == DCB_OUTPUT_TV) {

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278
279 /* if there's a spare crtc, using it will minimise flicker */
280 if (!(NVReadVgaCrtc(dev, head, NV_CIO_CRE_RPC1_INDEX) & 0xC0))
281 head ^= 1;
282
283 /* nv driver and nv31 use 0xfffffeee, nv34 and 6600 use 0xfffffece */
284 routput = (saved_routput & 0xfffffece) | head << 8;
285
286 if (nv_device(drm->device)->card_type >= NV_40) {
286 if (drm->device.info.family >= NV_DEVICE_INFO_V0_CURIE) {
287 if (dcb->type == DCB_OUTPUT_TV)
288 routput |= 0x1a << 16;
289 else
290 routput &= ~(0x1a << 16);
291 }
292
293 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + regoffset, routput);
294 msleep(1);

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393 dac_offset = nv04_dac_output_offset(rebind);
394 otherdac = NVReadRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + dac_offset);
395 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + dac_offset,
396 (otherdac & ~0x0100) | (head ^ 1) << 8);
397 }
398 }
399
400 /* This could use refinement for flatpanels, but it should work this way */
287 if (dcb->type == DCB_OUTPUT_TV)
288 routput |= 0x1a << 16;
289 else
290 routput &= ~(0x1a << 16);
291 }
292
293 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + regoffset, routput);
294 msleep(1);

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393 dac_offset = nv04_dac_output_offset(rebind);
394 otherdac = NVReadRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + dac_offset);
395 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + dac_offset,
396 (otherdac & ~0x0100) | (head ^ 1) << 8);
397 }
398 }
399
400 /* This could use refinement for flatpanels, but it should work this way */
401 if (nv_device(drm->device)->chipset < 0x44)
401 if (drm->device.info.chipset < 0x44)
402 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + nv04_dac_output_offset(encoder), 0xf0000000);
403 else
404 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + nv04_dac_output_offset(encoder), 0x00100000);
405}
406
407static void nv04_dac_commit(struct drm_encoder *encoder)
408{
409 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);

--- 147 unchanged lines hidden --- 		402 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + nv04_dac_output_offset(encoder), 0xf0000000);
403 else
404 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + nv04_dac_output_offset(encoder), 0x00100000);
405}
406
407static void nv04_dac_commit(struct drm_encoder *encoder)
408{
409 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);

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