interrupt.h (c8fe6a6811a7186656379d0c27e85325a966077a) interrupt.h (04d348ae3f0aea6523bc3b0688b5fc90c1c60d0e)
1/*
2 * Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the

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190
191struct intel_gvt_irq_map {
192 int up_irq_group;
193 int up_irq_bit;
194 int down_irq_group;
195 u32 down_irq_bitmask;
196};
197
1/*
2 * Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the

--- 181 unchanged lines hidden (view full) ---

190
191struct intel_gvt_irq_map {
192 int up_irq_group;
193 int up_irq_bit;
194 int down_irq_group;
195 u32 down_irq_bitmask;
196};
197
198struct intel_gvt_vblank_timer {
199 struct hrtimer timer;
200 u64 period;
201};
202
198/* structure containing device specific IRQ state */
199struct intel_gvt_irq {
200 struct intel_gvt_irq_ops *ops;
201 struct intel_gvt_irq_info *info[INTEL_GVT_IRQ_INFO_MAX];
202 DECLARE_BITMAP(irq_info_bitmap, INTEL_GVT_IRQ_INFO_MAX);
203 struct intel_gvt_event_info events[INTEL_GVT_EVENT_MAX];
204 DECLARE_BITMAP(pending_events, INTEL_GVT_EVENT_MAX);
205 struct intel_gvt_irq_map *irq_map;
203/* structure containing device specific IRQ state */
204struct intel_gvt_irq {
205 struct intel_gvt_irq_ops *ops;
206 struct intel_gvt_irq_info *info[INTEL_GVT_IRQ_INFO_MAX];
207 DECLARE_BITMAP(irq_info_bitmap, INTEL_GVT_IRQ_INFO_MAX);
208 struct intel_gvt_event_info events[INTEL_GVT_EVENT_MAX];
209 DECLARE_BITMAP(pending_events, INTEL_GVT_EVENT_MAX);
210 struct intel_gvt_irq_map *irq_map;
211 struct intel_gvt_vblank_timer vblank_timer;
206};
207
208int intel_gvt_init_irq(struct intel_gvt *gvt);
209void intel_gvt_clean_irq(struct intel_gvt *gvt);
210
211void intel_vgpu_trigger_virtual_event(struct intel_vgpu *vgpu,
212 enum intel_gvt_event_type event);
213
214int intel_vgpu_reg_iir_handler(struct intel_vgpu *vgpu, unsigned int reg,
215 void *p_data, unsigned int bytes);
216int intel_vgpu_reg_ier_handler(struct intel_vgpu *vgpu,
217 unsigned int reg, void *p_data, unsigned int bytes);
218int intel_vgpu_reg_master_irq_handler(struct intel_vgpu *vgpu,
219 unsigned int reg, void *p_data, unsigned int bytes);
220int intel_vgpu_reg_imr_handler(struct intel_vgpu *vgpu,
221 unsigned int reg, void *p_data, unsigned int bytes);
222
223#endif /* _GVT_INTERRUPT_H_ */
212};
213
214int intel_gvt_init_irq(struct intel_gvt *gvt);
215void intel_gvt_clean_irq(struct intel_gvt *gvt);
216
217void intel_vgpu_trigger_virtual_event(struct intel_vgpu *vgpu,
218 enum intel_gvt_event_type event);
219
220int intel_vgpu_reg_iir_handler(struct intel_vgpu *vgpu, unsigned int reg,
221 void *p_data, unsigned int bytes);
222int intel_vgpu_reg_ier_handler(struct intel_vgpu *vgpu,
223 unsigned int reg, void *p_data, unsigned int bytes);
224int intel_vgpu_reg_master_irq_handler(struct intel_vgpu *vgpu,
225 unsigned int reg, void *p_data, unsigned int bytes);
226int intel_vgpu_reg_imr_handler(struct intel_vgpu *vgpu,
227 unsigned int reg, void *p_data, unsigned int bytes);
228
229#endif /* _GVT_INTERRUPT_H_ */