soc15.h (be8454afc50f43016ca8b6130d9673bdd0bd56ec) | soc15.h (e78705ec5a7f607a3340c71a104b0d1c327958a4) |
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1/* 2 * Copyright 2016 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the --- 63 unchanged lines hidden (view full) --- 72int soc15_set_ip_blocks(struct amdgpu_device *adev); 73 74void soc15_program_register_sequence(struct amdgpu_device *adev, 75 const struct soc15_reg_golden *registers, 76 const u32 array_size); 77 78int vega10_reg_base_init(struct amdgpu_device *adev); 79int vega20_reg_base_init(struct amdgpu_device *adev); | 1/* 2 * Copyright 2016 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the --- 63 unchanged lines hidden (view full) --- 72int soc15_set_ip_blocks(struct amdgpu_device *adev); 73 74void soc15_program_register_sequence(struct amdgpu_device *adev, 75 const struct soc15_reg_golden *registers, 76 const u32 array_size); 77 78int vega10_reg_base_init(struct amdgpu_device *adev); 79int vega20_reg_base_init(struct amdgpu_device *adev); |
80int arct_reg_base_init(struct amdgpu_device *adev); |
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80 81void vega10_doorbell_index_init(struct amdgpu_device *adev); 82void vega20_doorbell_index_init(struct amdgpu_device *adev); 83#endif | 81 82void vega10_doorbell_index_init(struct amdgpu_device *adev); 83void vega20_doorbell_index_init(struct amdgpu_device *adev); 84#endif |