soc15.c (0c552ed38780f24b7ac235c3d10c6c94686ecfdf) soc15.c (1dfcdc30270a80ba5b45f922833c0c0e56d82576)
1/*
2 * Copyright 2016 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the

--- 839 unchanged lines hidden (view full) ---

848 .get_pcie_usage = &vega20_get_pcie_usage,
849 .need_reset_on_init = &soc15_need_reset_on_init,
850 .get_pcie_replay_count = &soc15_get_pcie_replay_count,
851 .supports_baco = &soc15_supports_baco,
852 .pre_asic_init = &soc15_pre_asic_init,
853 .query_video_codecs = &soc15_query_video_codecs,
854};
855
1/*
2 * Copyright 2016 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the

--- 839 unchanged lines hidden (view full) ---

848 .get_pcie_usage = &vega20_get_pcie_usage,
849 .need_reset_on_init = &soc15_need_reset_on_init,
850 .get_pcie_replay_count = &soc15_get_pcie_replay_count,
851 .supports_baco = &soc15_supports_baco,
852 .pre_asic_init = &soc15_pre_asic_init,
853 .query_video_codecs = &soc15_query_video_codecs,
854};
855
856static const struct amdgpu_asic_funcs aqua_vanjaram_asic_funcs =
857{
858 .read_disabled_bios = &soc15_read_disabled_bios,
859 .read_bios_from_rom = &amdgpu_soc15_read_bios_from_rom,
860 .read_register = &soc15_read_register,
861 .reset = &soc15_asic_reset,
862 .reset_method = &soc15_asic_reset_method,
863 .set_vga_state = &soc15_vga_set_state,
864 .get_xclk = &soc15_get_xclk,
865 .set_uvd_clocks = &soc15_set_uvd_clocks,
866 .set_vce_clocks = &soc15_set_vce_clocks,
867 .get_config_memsize = &soc15_get_config_memsize,
868 .need_full_reset = &soc15_need_full_reset,
869 .init_doorbell_index = &aqua_vanjaram_doorbell_index_init,
870 .get_pcie_usage = &vega20_get_pcie_usage,
871 .need_reset_on_init = &soc15_need_reset_on_init,
872 .get_pcie_replay_count = &soc15_get_pcie_replay_count,
873 .supports_baco = &soc15_supports_baco,
874 .pre_asic_init = &soc15_pre_asic_init,
875 .query_video_codecs = &soc15_query_video_codecs,
876};
877
856static int soc15_common_early_init(void *handle)
857{
858#define MMIO_REG_HOLE_OFFSET (0x80000 - PAGE_SIZE)
859 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
860
861 if (!amdgpu_sriov_vf(adev)) {
862 adev->rmmio_remap.reg_offset = MMIO_REG_HOLE_OFFSET;
863 adev->rmmio_remap.bus_addr = adev->rmmio_base + MMIO_REG_HOLE_OFFSET;

--- 227 unchanged lines hidden (view full) ---

1091 AMD_CG_SUPPORT_SDMA_MGCG |
1092 AMD_CG_SUPPORT_SDMA_LS |
1093 AMD_CG_SUPPORT_IH_CG |
1094 AMD_CG_SUPPORT_VCN_MGCG | AMD_CG_SUPPORT_JPEG_MGCG;
1095 adev->pg_flags = AMD_PG_SUPPORT_VCN_DPG;
1096 adev->external_rev_id = adev->rev_id + 0x3c;
1097 break;
1098 case IP_VERSION(9, 4, 3):
878static int soc15_common_early_init(void *handle)
879{
880#define MMIO_REG_HOLE_OFFSET (0x80000 - PAGE_SIZE)
881 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
882
883 if (!amdgpu_sriov_vf(adev)) {
884 adev->rmmio_remap.reg_offset = MMIO_REG_HOLE_OFFSET;
885 adev->rmmio_remap.bus_addr = adev->rmmio_base + MMIO_REG_HOLE_OFFSET;

--- 227 unchanged lines hidden (view full) ---

1113 AMD_CG_SUPPORT_SDMA_MGCG |
1114 AMD_CG_SUPPORT_SDMA_LS |
1115 AMD_CG_SUPPORT_IH_CG |
1116 AMD_CG_SUPPORT_VCN_MGCG | AMD_CG_SUPPORT_JPEG_MGCG;
1117 adev->pg_flags = AMD_PG_SUPPORT_VCN_DPG;
1118 adev->external_rev_id = adev->rev_id + 0x3c;
1119 break;
1120 case IP_VERSION(9, 4, 3):
1099 adev->asic_funcs = &vega20_asic_funcs;
1121 adev->asic_funcs = &aqua_vanjaram_asic_funcs;
1100 adev->cg_flags =
1101 AMD_CG_SUPPORT_VCN_MGCG |
1102 AMD_CG_SUPPORT_JPEG_MGCG;
1103 adev->pg_flags =
1104 AMD_PG_SUPPORT_VCN |
1105 AMD_PG_SUPPORT_VCN_DPG |
1106 AMD_PG_SUPPORT_JPEG;
1107 break;

--- 303 unchanged lines hidden --- 		1122 adev->cg_flags =
1123 AMD_CG_SUPPORT_VCN_MGCG |
1124 AMD_CG_SUPPORT_JPEG_MGCG;
1125 adev->pg_flags =
1126 AMD_PG_SUPPORT_VCN |
1127 AMD_PG_SUPPORT_VCN_DPG |
1128 AMD_PG_SUPPORT_JPEG;
1129 break;

--- 303 unchanged lines hidden ---