amdgpu.h (93235bfd5a9c3329df31d1a4d7a93d138b3138c2) amdgpu.h (90f56611fc5b54d55e94ded1d494d6090649bdb6)
1/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation

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145};
146
147#define AMDGPU_MAX_TIMEOUT_PARAM_LENGTH 256
148
149/*
150 * Modules parameters.
151 */
152extern int amdgpu_modeset;
1/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation

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145};
146
147#define AMDGPU_MAX_TIMEOUT_PARAM_LENGTH 256
148
149/*
150 * Modules parameters.
151 */
152extern int amdgpu_modeset;
153extern int amdgpu_vram_limit;
153extern unsigned int amdgpu_vram_limit;
154extern int amdgpu_vis_vram_limit;
155extern int amdgpu_gart_size;
156extern int amdgpu_gtt_size;
157extern int amdgpu_moverate;
158extern int amdgpu_audio;
159extern int amdgpu_disp_priority;
160extern int amdgpu_hw_i2c;
161extern int amdgpu_pcie_gen2;

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604int amdgpu_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp);
605int amdgpu_cs_fence_to_handle_ioctl(struct drm_device *dev, void *data,
606 struct drm_file *filp);
607int amdgpu_cs_wait_ioctl(struct drm_device *dev, void *data, struct drm_file *filp);
608int amdgpu_cs_wait_fences_ioctl(struct drm_device *dev, void *data,
609 struct drm_file *filp);
610
611/* VRAM scratch page for HDP bug, default vram page */
154extern int amdgpu_vis_vram_limit;
155extern int amdgpu_gart_size;
156extern int amdgpu_gtt_size;
157extern int amdgpu_moverate;
158extern int amdgpu_audio;
159extern int amdgpu_disp_priority;
160extern int amdgpu_hw_i2c;
161extern int amdgpu_pcie_gen2;

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604int amdgpu_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp);
605int amdgpu_cs_fence_to_handle_ioctl(struct drm_device *dev, void *data,
606 struct drm_file *filp);
607int amdgpu_cs_wait_ioctl(struct drm_device *dev, void *data, struct drm_file *filp);
608int amdgpu_cs_wait_fences_ioctl(struct drm_device *dev, void *data,
609 struct drm_file *filp);
610
611/* VRAM scratch page for HDP bug, default vram page */
612struct amdgpu_vram_scratch {
612struct amdgpu_mem_scratch {
613 struct amdgpu_bo *robj;
614 volatile uint32_t *ptr;
615 u64 gpu_addr;
616};
617
618/*
619 * CGS
620 */

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751 struct amdgpu_mqd_prop *p);
752};
753
754#define AMDGPU_RESET_MAGIC_NUM 64
755#define AMDGPU_MAX_DF_PERFMONS 4
756#define AMDGPU_PRODUCT_NAME_LEN 64
757struct amdgpu_reset_domain;
758
613 struct amdgpu_bo *robj;
614 volatile uint32_t *ptr;
615 u64 gpu_addr;
616};
617
618/*
619 * CGS
620 */

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751 struct amdgpu_mqd_prop *p);
752};
753
754#define AMDGPU_RESET_MAGIC_NUM 64
755#define AMDGPU_MAX_DF_PERFMONS 4
756#define AMDGPU_PRODUCT_NAME_LEN 64
757struct amdgpu_reset_domain;
758
759/*
760 * Non-zero (true) if the GPU has VRAM. Zero (false) otherwise.
761 */
762#define AMDGPU_HAS_VRAM(_adev) ((_adev)->gmc.real_vram_size)
763
759struct amdgpu_device {
760 struct device *dev;
761 struct pci_dev *pdev;
762 struct drm_device ddev;
763
764#ifdef CONFIG_DRM_AMD_ACP
765 struct amdgpu_acp acp;
766#endif

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844 struct amdgpu_gart gart;
845 dma_addr_t dummy_page_addr;
846 struct amdgpu_vm_manager vm_manager;
847 struct amdgpu_vmhub vmhub[AMDGPU_MAX_VMHUBS];
848 unsigned num_vmhubs;
849
850 /* memory management */
851 struct amdgpu_mman mman;
764struct amdgpu_device {
765 struct device *dev;
766 struct pci_dev *pdev;
767 struct drm_device ddev;
768
769#ifdef CONFIG_DRM_AMD_ACP
770 struct amdgpu_acp acp;
771#endif

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849 struct amdgpu_gart gart;
850 dma_addr_t dummy_page_addr;
851 struct amdgpu_vm_manager vm_manager;
852 struct amdgpu_vmhub vmhub[AMDGPU_MAX_VMHUBS];
853 unsigned num_vmhubs;
854
855 /* memory management */
856 struct amdgpu_mman mman;
852 struct amdgpu_vram_scratch vram_scratch;
857 struct amdgpu_mem_scratch mem_scratch;
853 struct amdgpu_wb wb;
854 atomic64_t num_bytes_moved;
855 atomic64_t num_evictions;
856 atomic64_t num_vram_cpu_page_faults;
857 atomic_t gpu_reset_counter;
858 atomic_t vram_lost_counter;
859
860 /* data for buffer migration throttling */

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866 u32 log2_max_MBps;
867 } mm_stats;
868
869 /* display */
870 bool enable_virtual_display;
871 struct amdgpu_vkms_output *amdgpu_vkms_output;
872 struct amdgpu_mode_info mode_info;
873 /* For pre-DCE11. DCE11 and later are in "struct amdgpu_device->dm" */
858 struct amdgpu_wb wb;
859 atomic64_t num_bytes_moved;
860 atomic64_t num_evictions;
861 atomic64_t num_vram_cpu_page_faults;
862 atomic_t gpu_reset_counter;
863 atomic_t vram_lost_counter;
864
865 /* data for buffer migration throttling */

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871 u32 log2_max_MBps;
872 } mm_stats;
873
874 /* display */
875 bool enable_virtual_display;
876 struct amdgpu_vkms_output *amdgpu_vkms_output;
877 struct amdgpu_mode_info mode_info;
878 /* For pre-DCE11. DCE11 and later are in "struct amdgpu_device->dm" */
874 struct work_struct hotplug_work;
879 struct delayed_work hotplug_work;
875 struct amdgpu_irq_src crtc_irq;
876 struct amdgpu_irq_src vline0_irq;
877 struct amdgpu_irq_src vupdate_irq;
878 struct amdgpu_irq_src pageflip_irq;
879 struct amdgpu_irq_src hpd_irq;
880 struct amdgpu_irq_src dmub_trace_irq;
881 struct amdgpu_irq_src dmub_outbox_irq;
882

--- 573 unchanged lines hidden --- 		880 struct amdgpu_irq_src crtc_irq;
881 struct amdgpu_irq_src vline0_irq;
882 struct amdgpu_irq_src vupdate_irq;
883 struct amdgpu_irq_src pageflip_irq;
884 struct amdgpu_irq_src hpd_irq;
885 struct amdgpu_irq_src dmub_trace_irq;
886 struct amdgpu_irq_src dmub_outbox_irq;
887

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