| hisi_dma.c (e3bdaa04ada31f46d0586df83a2789b8913053c5) | hisi_dma.c (94477a79cf80e8ab55b68f14bc579a12ddea1e0b) |
|---|---|
| 1// SPDX-License-Identifier: GPL-2.0-only 2/* Copyright(c) 2019 HiSilicon Limited. */ 3#include <linux/bitfield.h> 4#include <linux/dmaengine.h> 5#include <linux/init.h> 6#include <linux/iopoll.h> 7#include <linux/module.h> 8#include <linux/pci.h> --- 422 unchanged lines hidden (view full) --- 431 struct hisi_dma_desc *desc; 432 struct hisi_dma_cqe *cqe; 433 434 spin_lock(&chan->vc.lock); 435 436 desc = chan->desc; 437 cqe = chan->cq + chan->cq_head; 438 if (desc) { | 1// SPDX-License-Identifier: GPL-2.0-only 2/* Copyright(c) 2019 HiSilicon Limited. */ 3#include <linux/bitfield.h> 4#include <linux/dmaengine.h> 5#include <linux/init.h> 6#include <linux/iopoll.h> 7#include <linux/module.h> 8#include <linux/pci.h> --- 422 unchanged lines hidden (view full) --- 431 struct hisi_dma_desc *desc; 432 struct hisi_dma_cqe *cqe; 433 434 spin_lock(&chan->vc.lock); 435 436 desc = chan->desc; 437 cqe = chan->cq + chan->cq_head; 438 if (desc) { |
| 439 chan->cq_head = (chan->cq_head + 1) % hdma_dev->chan_depth; 440 hisi_dma_chan_write(hdma_dev->base, HISI_DMA_CQ_HEAD_PTR, 441 chan->qp_num, chan->cq_head); |
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| 439 if (FIELD_GET(STATUS_MASK, cqe->w0) == STATUS_SUCC) { | 442 if (FIELD_GET(STATUS_MASK, cqe->w0) == STATUS_SUCC) { |
| 440 chan->cq_head = (chan->cq_head + 1) % 441 hdma_dev->chan_depth; 442 hisi_dma_chan_write(hdma_dev->base, 443 HISI_DMA_CQ_HEAD_PTR, chan->qp_num, 444 chan->cq_head); | |
| 445 vchan_cookie_complete(&desc->vd); 446 } else { 447 dev_err(&hdma_dev->pdev->dev, "task error!\n"); 448 } 449 450 chan->desc = NULL; 451 } 452 --- 147 unchanged lines hidden --- | 443 vchan_cookie_complete(&desc->vd); 444 } else { 445 dev_err(&hdma_dev->pdev->dev, "task error!\n"); 446 } 447 448 chan->desc = NULL; 449 } 450 --- 147 unchanged lines hidden --- |