apple-admac.c (c900529f3d9161bfde5cca0754f83b4d3c3e0220) apple-admac.c (43ee59fa01c8a1e8ce46b9248c678ba6f739681a)
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Driver for Audio DMA Controller (ADMAC) on t8103 (M1) and other Apple chips
4 *
5 * Copyright (C) The Asahi Linux Contributors
6 */
7
8#include <linux/bits.h>

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52
53#define REG_DESC_RING(ch) (0x8070 + (ch) * 0x200)
54#define REG_REPORT_RING(ch) (0x8074 + (ch) * 0x200)
55
56#define REG_RESIDUE(ch) (0x8064 + (ch) * 0x200)
57
58#define REG_BUS_WIDTH(ch) (0x8040 + (ch) * 0x200)
59
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Driver for Audio DMA Controller (ADMAC) on t8103 (M1) and other Apple chips
4 *
5 * Copyright (C) The Asahi Linux Contributors
6 */
7
8#include <linux/bits.h>

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52
53#define REG_DESC_RING(ch) (0x8070 + (ch) * 0x200)
54#define REG_REPORT_RING(ch) (0x8074 + (ch) * 0x200)
55
56#define REG_RESIDUE(ch) (0x8064 + (ch) * 0x200)
57
58#define REG_BUS_WIDTH(ch) (0x8040 + (ch) * 0x200)
59
60#define BUS_WIDTH_WORD_SIZE GENMASK(3, 0)
61#define BUS_WIDTH_FRAME_SIZE GENMASK(7, 4)
60#define BUS_WIDTH_8BIT 0x00
61#define BUS_WIDTH_16BIT 0x01
62#define BUS_WIDTH_32BIT 0x02
63#define BUS_WIDTH_FRAME_2_WORDS 0x10
64#define BUS_WIDTH_FRAME_4_WORDS 0x20
65
66#define REG_CHAN_SRAM_CARVEOUT(ch) (0x8050 + (ch) * 0x200)
67#define CHAN_SRAM_CARVEOUT_SIZE GENMASK(31, 16)

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735
736static int admac_device_config(struct dma_chan *chan,
737 struct dma_slave_config *config)
738{
739 struct admac_chan *adchan = to_admac_chan(chan);
740 struct admac_data *ad = adchan->host;
741 bool is_tx = admac_chan_direction(adchan->no) == DMA_MEM_TO_DEV;
742 int wordsize = 0;
62#define BUS_WIDTH_8BIT 0x00
63#define BUS_WIDTH_16BIT 0x01
64#define BUS_WIDTH_32BIT 0x02
65#define BUS_WIDTH_FRAME_2_WORDS 0x10
66#define BUS_WIDTH_FRAME_4_WORDS 0x20
67
68#define REG_CHAN_SRAM_CARVEOUT(ch) (0x8050 + (ch) * 0x200)
69#define CHAN_SRAM_CARVEOUT_SIZE GENMASK(31, 16)

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737
738static int admac_device_config(struct dma_chan *chan,
739 struct dma_slave_config *config)
740{
741 struct admac_chan *adchan = to_admac_chan(chan);
742 struct admac_data *ad = adchan->host;
743 bool is_tx = admac_chan_direction(adchan->no) == DMA_MEM_TO_DEV;
744 int wordsize = 0;
743 u32 bus_width = 0;
745 u32 bus_width = readl_relaxed(ad->base + REG_BUS_WIDTH(adchan->no)) &
746 ~(BUS_WIDTH_WORD_SIZE | BUS_WIDTH_FRAME_SIZE);
744
745 switch (is_tx ? config->dst_addr_width : config->src_addr_width) {
746 case DMA_SLAVE_BUSWIDTH_1_BYTE:
747 wordsize = 1;
748 bus_width |= BUS_WIDTH_8BIT;
749 break;
750 case DMA_SLAVE_BUSWIDTH_2_BYTES:
751 wordsize = 2;

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748 switch (is_tx ? config->dst_addr_width : config->src_addr_width) {
749 case DMA_SLAVE_BUSWIDTH_1_BYTE:
750 wordsize = 1;
751 bus_width |= BUS_WIDTH_8BIT;
752 break;
753 case DMA_SLAVE_BUSWIDTH_2_BYTES:
754 wordsize = 2;

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