composite.c (4b4193256c8d3bc3a5397b5cd9494c2ad386317d) composite.c (ed06099c5d0b329082cc19c58eace0b20bf7fe70)
1/*
2 * TI composite clock support
3 *
4 * Copyright (C) 2013 Texas Instruments, Inc.
5 *
6 * Tero Kristo <t-kristo@ti.com>
7 *
8 * This program is free software; you can redistribute it and/or modify

--- 111 unchanged lines hidden (view full) ---

120 struct device_node *node)
121{
122 struct clk_hw *hw = user;
123 struct clk *clk;
124 struct clk_hw_omap_comp *cclk = to_clk_hw_comp(hw);
125 struct component_clk *comp;
126 int num_parents = 0;
127 const char **parent_names = NULL;
1/*
2 * TI composite clock support
3 *
4 * Copyright (C) 2013 Texas Instruments, Inc.
5 *
6 * Tero Kristo <t-kristo@ti.com>
7 *
8 * This program is free software; you can redistribute it and/or modify

--- 111 unchanged lines hidden (view full) ---

120 struct device_node *node)
121{
122 struct clk_hw *hw = user;
123 struct clk *clk;
124 struct clk_hw_omap_comp *cclk = to_clk_hw_comp(hw);
125 struct component_clk *comp;
126 int num_parents = 0;
127 const char **parent_names = NULL;
128 const char *name;
128 int i;
129 int ret;
130
131 /* Check for presence of each component clock */
132 for (i = 0; i < CLK_COMPONENT_TYPE_MAX; i++) {
133 if (!cclk->comp_nodes[i])
134 continue;
135

--- 31 unchanged lines hidden (view full) ---

167 }
168 }
169
170 if (!num_parents) {
171 pr_err("%s: no parents found for %pOFn!\n", __func__, node);
172 goto cleanup;
173 }
174
129 int i;
130 int ret;
131
132 /* Check for presence of each component clock */
133 for (i = 0; i < CLK_COMPONENT_TYPE_MAX; i++) {
134 if (!cclk->comp_nodes[i])
135 continue;
136

--- 31 unchanged lines hidden (view full) ---

168 }
169 }
170
171 if (!num_parents) {
172 pr_err("%s: no parents found for %pOFn!\n", __func__, node);
173 goto cleanup;
174 }
175
175 clk = clk_register_composite(NULL, node->name,
176 name = ti_dt_clk_name(node);
177 clk = clk_register_composite(NULL, name,
176 parent_names, num_parents,
177 _get_hw(cclk, CLK_COMPONENT_TYPE_MUX),
178 &ti_clk_mux_ops,
179 _get_hw(cclk, CLK_COMPONENT_TYPE_DIVIDER),
180 &ti_composite_divider_ops,
181 _get_hw(cclk, CLK_COMPONENT_TYPE_GATE),
182 &ti_composite_gate_ops, 0);
183
184 if (!IS_ERR(clk)) {
178 parent_names, num_parents,
179 _get_hw(cclk, CLK_COMPONENT_TYPE_MUX),
180 &ti_clk_mux_ops,
181 _get_hw(cclk, CLK_COMPONENT_TYPE_DIVIDER),
182 &ti_composite_divider_ops,
183 _get_hw(cclk, CLK_COMPONENT_TYPE_GATE),
184 &ti_composite_gate_ops, 0);
185
186 if (!IS_ERR(clk)) {
185 ret = ti_clk_add_alias(NULL, clk, node->name);
187 ret = ti_clk_add_alias(NULL, clk, name);
186 if (ret) {
187 clk_unregister(clk);
188 goto cleanup;
189 }
190 of_clk_add_provider(node, of_clk_src_simple_get, clk);
191 }
192
193cleanup:

--- 83 unchanged lines hidden --- 		188 if (ret) {
189 clk_unregister(clk);
190 goto cleanup;
191 }
192 of_clk_add_provider(node, of_clk_src_simple_get, clk);
193 }
194
195cleanup:

--- 83 unchanged lines hidden ---