clk-tegra124.c (bdc753c7fcb4eb009ae246a188ea7ac6dac98ce1) | clk-tegra124.c (c461c677a8cb19026fd06741a23ff32d0759342b) |
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1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Copyright (c) 2012-2014 NVIDIA CORPORATION. All rights reserved. 4 */ 5 6#include <linux/io.h> 7#include <linux/clk-provider.h> 8#include <linux/clkdev.h> --- 1316 unchanged lines hidden (view full) --- 1325 { TEGRA124_CLK_VIC03, TEGRA124_CLK_PLL_C3, 0, 0 }, 1326 { TEGRA124_CLK_SPDIF_IN_SYNC, TEGRA124_CLK_CLK_MAX, 24576000, 0 }, 1327 { TEGRA124_CLK_I2S0_SYNC, TEGRA124_CLK_CLK_MAX, 24576000, 0 }, 1328 { TEGRA124_CLK_I2S1_SYNC, TEGRA124_CLK_CLK_MAX, 24576000, 0 }, 1329 { TEGRA124_CLK_I2S2_SYNC, TEGRA124_CLK_CLK_MAX, 24576000, 0 }, 1330 { TEGRA124_CLK_I2S3_SYNC, TEGRA124_CLK_CLK_MAX, 24576000, 0 }, 1331 { TEGRA124_CLK_I2S4_SYNC, TEGRA124_CLK_CLK_MAX, 24576000, 0 }, 1332 { TEGRA124_CLK_VIMCLK_SYNC, TEGRA124_CLK_CLK_MAX, 24576000, 0 }, | 1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Copyright (c) 2012-2014 NVIDIA CORPORATION. All rights reserved. 4 */ 5 6#include <linux/io.h> 7#include <linux/clk-provider.h> 8#include <linux/clkdev.h> --- 1316 unchanged lines hidden (view full) --- 1325 { TEGRA124_CLK_VIC03, TEGRA124_CLK_PLL_C3, 0, 0 }, 1326 { TEGRA124_CLK_SPDIF_IN_SYNC, TEGRA124_CLK_CLK_MAX, 24576000, 0 }, 1327 { TEGRA124_CLK_I2S0_SYNC, TEGRA124_CLK_CLK_MAX, 24576000, 0 }, 1328 { TEGRA124_CLK_I2S1_SYNC, TEGRA124_CLK_CLK_MAX, 24576000, 0 }, 1329 { TEGRA124_CLK_I2S2_SYNC, TEGRA124_CLK_CLK_MAX, 24576000, 0 }, 1330 { TEGRA124_CLK_I2S3_SYNC, TEGRA124_CLK_CLK_MAX, 24576000, 0 }, 1331 { TEGRA124_CLK_I2S4_SYNC, TEGRA124_CLK_CLK_MAX, 24576000, 0 }, 1332 { TEGRA124_CLK_VIMCLK_SYNC, TEGRA124_CLK_CLK_MAX, 24576000, 0 }, |
1333 { TEGRA124_CLK_PWM, TEGRA124_CLK_PLL_P, 408000000, 0 }, |
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1333 /* must be the last entry */ 1334 { TEGRA124_CLK_CLK_MAX, TEGRA124_CLK_CLK_MAX, 0, 0 }, 1335}; 1336 1337static struct tegra_clk_init_table tegra124_init_table[] __initdata = { 1338 { TEGRA124_CLK_SOC_THERM, TEGRA124_CLK_PLL_P, 51000000, 0 }, 1339 { TEGRA124_CLK_CCLK_G, TEGRA124_CLK_CLK_MAX, 0, 1 }, 1340 { TEGRA124_CLK_HDA, TEGRA124_CLK_PLL_P, 102000000, 0 }, --- 256 unchanged lines hidden --- | 1334 /* must be the last entry */ 1335 { TEGRA124_CLK_CLK_MAX, TEGRA124_CLK_CLK_MAX, 0, 0 }, 1336}; 1337 1338static struct tegra_clk_init_table tegra124_init_table[] __initdata = { 1339 { TEGRA124_CLK_SOC_THERM, TEGRA124_CLK_PLL_P, 51000000, 0 }, 1340 { TEGRA124_CLK_CCLK_G, TEGRA124_CLK_CLK_MAX, 0, 1 }, 1341 { TEGRA124_CLK_HDA, TEGRA124_CLK_PLL_P, 102000000, 0 }, --- 256 unchanged lines hidden --- |