clk-periph.c (f01387d2693813eb5271a3448e6a082322c7d75d) | clk-periph.c (4e907ef6bd5eeb18bcc78f08bc993b94f007b79f) |
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1/* 2 * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms and conditions of the GNU General Public License, 6 * version 2, as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope it will be useful, but WITHOUT --- 14 unchanged lines hidden (view full) --- 23#include "clk.h" 24 25static u8 clk_periph_get_parent(struct clk_hw *hw) 26{ 27 struct tegra_clk_periph *periph = to_clk_periph(hw); 28 const struct clk_ops *mux_ops = periph->mux_ops; 29 struct clk_hw *mux_hw = &periph->mux.hw; 30 | 1/* 2 * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms and conditions of the GNU General Public License, 6 * version 2, as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope it will be useful, but WITHOUT --- 14 unchanged lines hidden (view full) --- 23#include "clk.h" 24 25static u8 clk_periph_get_parent(struct clk_hw *hw) 26{ 27 struct tegra_clk_periph *periph = to_clk_periph(hw); 28 const struct clk_ops *mux_ops = periph->mux_ops; 29 struct clk_hw *mux_hw = &periph->mux.hw; 30 |
31 mux_hw->clk = hw->clk; | 31 __clk_hw_set_clk(mux_hw, hw); |
32 33 return mux_ops->get_parent(mux_hw); 34} 35 36static int clk_periph_set_parent(struct clk_hw *hw, u8 index) 37{ 38 struct tegra_clk_periph *periph = to_clk_periph(hw); 39 const struct clk_ops *mux_ops = periph->mux_ops; 40 struct clk_hw *mux_hw = &periph->mux.hw; 41 | 32 33 return mux_ops->get_parent(mux_hw); 34} 35 36static int clk_periph_set_parent(struct clk_hw *hw, u8 index) 37{ 38 struct tegra_clk_periph *periph = to_clk_periph(hw); 39 const struct clk_ops *mux_ops = periph->mux_ops; 40 struct clk_hw *mux_hw = &periph->mux.hw; 41 |
42 mux_hw->clk = hw->clk; | 42 __clk_hw_set_clk(mux_hw, hw); |
43 44 return mux_ops->set_parent(mux_hw, index); 45} 46 47static unsigned long clk_periph_recalc_rate(struct clk_hw *hw, 48 unsigned long parent_rate) 49{ 50 struct tegra_clk_periph *periph = to_clk_periph(hw); 51 const struct clk_ops *div_ops = periph->div_ops; 52 struct clk_hw *div_hw = &periph->divider.hw; 53 | 43 44 return mux_ops->set_parent(mux_hw, index); 45} 46 47static unsigned long clk_periph_recalc_rate(struct clk_hw *hw, 48 unsigned long parent_rate) 49{ 50 struct tegra_clk_periph *periph = to_clk_periph(hw); 51 const struct clk_ops *div_ops = periph->div_ops; 52 struct clk_hw *div_hw = &periph->divider.hw; 53 |
54 div_hw->clk = hw->clk; | 54 __clk_hw_set_clk(div_hw, hw); |
55 56 return div_ops->recalc_rate(div_hw, parent_rate); 57} 58 59static long clk_periph_round_rate(struct clk_hw *hw, unsigned long rate, 60 unsigned long *prate) 61{ 62 struct tegra_clk_periph *periph = to_clk_periph(hw); 63 const struct clk_ops *div_ops = periph->div_ops; 64 struct clk_hw *div_hw = &periph->divider.hw; 65 | 55 56 return div_ops->recalc_rate(div_hw, parent_rate); 57} 58 59static long clk_periph_round_rate(struct clk_hw *hw, unsigned long rate, 60 unsigned long *prate) 61{ 62 struct tegra_clk_periph *periph = to_clk_periph(hw); 63 const struct clk_ops *div_ops = periph->div_ops; 64 struct clk_hw *div_hw = &periph->divider.hw; 65 |
66 div_hw->clk = hw->clk; | 66 __clk_hw_set_clk(div_hw, hw); |
67 68 return div_ops->round_rate(div_hw, rate, prate); 69} 70 71static int clk_periph_set_rate(struct clk_hw *hw, unsigned long rate, 72 unsigned long parent_rate) 73{ 74 struct tegra_clk_periph *periph = to_clk_periph(hw); 75 const struct clk_ops *div_ops = periph->div_ops; 76 struct clk_hw *div_hw = &periph->divider.hw; 77 | 67 68 return div_ops->round_rate(div_hw, rate, prate); 69} 70 71static int clk_periph_set_rate(struct clk_hw *hw, unsigned long rate, 72 unsigned long parent_rate) 73{ 74 struct tegra_clk_periph *periph = to_clk_periph(hw); 75 const struct clk_ops *div_ops = periph->div_ops; 76 struct clk_hw *div_hw = &periph->divider.hw; 77 |
78 div_hw->clk = hw->clk; | 78 __clk_hw_set_clk(div_hw, hw); |
79 80 return div_ops->set_rate(div_hw, rate, parent_rate); 81} 82 83static int clk_periph_is_enabled(struct clk_hw *hw) 84{ 85 struct tegra_clk_periph *periph = to_clk_periph(hw); 86 const struct clk_ops *gate_ops = periph->gate_ops; 87 struct clk_hw *gate_hw = &periph->gate.hw; 88 | 79 80 return div_ops->set_rate(div_hw, rate, parent_rate); 81} 82 83static int clk_periph_is_enabled(struct clk_hw *hw) 84{ 85 struct tegra_clk_periph *periph = to_clk_periph(hw); 86 const struct clk_ops *gate_ops = periph->gate_ops; 87 struct clk_hw *gate_hw = &periph->gate.hw; 88 |
89 gate_hw->clk = hw->clk; | 89 __clk_hw_set_clk(gate_hw, hw); |
90 91 return gate_ops->is_enabled(gate_hw); 92} 93 94static int clk_periph_enable(struct clk_hw *hw) 95{ 96 struct tegra_clk_periph *periph = to_clk_periph(hw); 97 const struct clk_ops *gate_ops = periph->gate_ops; 98 struct clk_hw *gate_hw = &periph->gate.hw; 99 | 90 91 return gate_ops->is_enabled(gate_hw); 92} 93 94static int clk_periph_enable(struct clk_hw *hw) 95{ 96 struct tegra_clk_periph *periph = to_clk_periph(hw); 97 const struct clk_ops *gate_ops = periph->gate_ops; 98 struct clk_hw *gate_hw = &periph->gate.hw; 99 |
100 gate_hw->clk = hw->clk; | 100 __clk_hw_set_clk(gate_hw, hw); |
101 102 return gate_ops->enable(gate_hw); 103} 104 105static void clk_periph_disable(struct clk_hw *hw) 106{ 107 struct tegra_clk_periph *periph = to_clk_periph(hw); 108 const struct clk_ops *gate_ops = periph->gate_ops; --- 98 unchanged lines hidden --- | 101 102 return gate_ops->enable(gate_hw); 103} 104 105static void clk_periph_disable(struct clk_hw *hw) 106{ 107 struct tegra_clk_periph *periph = to_clk_periph(hw); 108 const struct clk_ops *gate_ops = periph->gate_ops; --- 98 unchanged lines hidden --- |