clk-pxa.h (fd13f8117f7a2d4054bf420ec1428e918a24a480) clk-pxa.h (3c816d950a494ae6e16b1fa017af29bc53cb7791)
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Marvell PXA family clocks
4 *
5 * Copyright (C) 2014 Robert Jarzmik
6 *
7 * Common clock code for PXA clocks ("CKEN" type clocks + DT)
8 */

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100 * +------------+ +-----------+ /+-----+ +-----------+
101 * | High Power | | x mult_hp |/
102 * | Clock | --- | / div_hp |
103 * +------------+ +-----------+
104 */
105struct desc_clk_cken {
106 struct clk_hw hw;
107 int ckid;
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Marvell PXA family clocks
4 *
5 * Copyright (C) 2014 Robert Jarzmik
6 *
7 * Common clock code for PXA clocks ("CKEN" type clocks + DT)
8 */

--- 91 unchanged lines hidden (view full) ---

100 * +------------+ +-----------+ /+-----+ +-----------+
101 * | High Power | | x mult_hp |/
102 * | Clock | --- | / div_hp |
103 * +------------+ +-----------+
104 */
105struct desc_clk_cken {
106 struct clk_hw hw;
107 int ckid;
108 int cken_reg;
108 const char *name;
109 const char *dev_id;
110 const char *con_id;
111 const char * const *parent_names;
112 struct clk_fixed_factor lp;
113 struct clk_fixed_factor hp;
114 struct clk_gate gate;
115 bool (*is_in_low_power)(void);
116 const unsigned long flags;
117};
118
119#define PXA_CKEN(_dev_id, _con_id, _name, parents, _mult_lp, _div_lp, \
120 _mult_hp, _div_hp, is_lp, _cken_reg, _cken_bit, flag) \
121 { .ckid = CLK_ ## _name, .name = #_name, \
109 const char *name;
110 const char *dev_id;
111 const char *con_id;
112 const char * const *parent_names;
113 struct clk_fixed_factor lp;
114 struct clk_fixed_factor hp;
115 struct clk_gate gate;
116 bool (*is_in_low_power)(void);
117 const unsigned long flags;
118};
119
120#define PXA_CKEN(_dev_id, _con_id, _name, parents, _mult_lp, _div_lp, \
121 _mult_hp, _div_hp, is_lp, _cken_reg, _cken_bit, flag) \
122 { .ckid = CLK_ ## _name, .name = #_name, \
123 .cken_reg = _cken_reg, \
122 .dev_id = _dev_id, .con_id = _con_id, .parent_names = parents,\
123 .lp = { .mult = _mult_lp, .div = _div_lp }, \
124 .hp = { .mult = _mult_hp, .div = _div_hp }, \
125 .is_in_low_power = is_lp, \
124 .dev_id = _dev_id, .con_id = _con_id, .parent_names = parents,\
125 .lp = { .mult = _mult_lp, .div = _div_lp }, \
126 .hp = { .mult = _mult_hp, .div = _div_hp }, \
127 .is_in_low_power = is_lp, \
126 .gate = { .reg = (void __iomem *)_cken_reg, .bit_idx = _cken_bit }, \
128 .gate = { .bit_idx = _cken_bit }, \
127 .flags = flag, \
128 }
129#define PXA_CKEN_1RATE(dev_id, con_id, name, parents, cken_reg, \
130 cken_bit, flag) \
131 PXA_CKEN(dev_id, con_id, name, parents, 1, 1, 1, 1, \
132 NULL, cken_reg, cken_bit, flag)
133
134struct pxa2xx_freq {

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142static inline int dummy_clk_set_parent(struct clk_hw *hw, u8 index)
143{
144 return 0;
145}
146
147extern void clkdev_pxa_register(int ckid, const char *con_id,
148 const char *dev_id, struct clk *clk);
149extern int clk_pxa_cken_init(const struct desc_clk_cken *clks,
129 .flags = flag, \
130 }
131#define PXA_CKEN_1RATE(dev_id, con_id, name, parents, cken_reg, \
132 cken_bit, flag) \
133 PXA_CKEN(dev_id, con_id, name, parents, 1, 1, 1, 1, \
134 NULL, cken_reg, cken_bit, flag)
135
136struct pxa2xx_freq {

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144static inline int dummy_clk_set_parent(struct clk_hw *hw, u8 index)
145{
146 return 0;
147}
148
149extern void clkdev_pxa_register(int ckid, const char *con_id,
150 const char *dev_id, struct clk *clk);
151extern int clk_pxa_cken_init(const struct desc_clk_cken *clks,
150 int nb_clks);
152 int nb_clks, void __iomem *clk_regs);
151void clk_pxa_dt_common_init(struct device_node *np);
152
153void pxa2xx_core_turbo_switch(bool on);
154void pxa2xx_cpll_change(struct pxa2xx_freq *freq,
155 u32 (*mdrefr_dri)(unsigned int),
156 void __iomem *cccr);
157int pxa2xx_determine_rate(struct clk_rate_request *req,
158 struct pxa2xx_freq *freqs, int nb_freqs);
159
160#endif
153void clk_pxa_dt_common_init(struct device_node *np);
154
155void pxa2xx_core_turbo_switch(bool on);
156void pxa2xx_cpll_change(struct pxa2xx_freq *freq,
157 u32 (*mdrefr_dri)(unsigned int),
158 void __iomem *cccr);
159int pxa2xx_determine_rate(struct clk_rate_request *req,
160 struct pxa2xx_freq *freqs, int nb_freqs);
161
162#endif