clk-pxa.c (fd13f8117f7a2d4054bf420ec1428e918a24a480) clk-pxa.c (3c816d950a494ae6e16b1fa017af29bc53cb7791)
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Marvell PXA family clocks
4 *
5 * Copyright (C) 2014 Robert Jarzmik
6 *
7 * Common clock code for PXA clocks ("CKEN" type clocks + DT)
8 */

--- 81 unchanged lines hidden (view full) ---

90 const char *dev_id, struct clk *clk)
91{
92 if (!IS_ERR(clk) && (ckid != CLK_NONE))
93 pxa_clocks[ckid] = clk;
94 if (!IS_ERR(clk))
95 clk_register_clkdev(clk, con_id, dev_id);
96}
97
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Marvell PXA family clocks
4 *
5 * Copyright (C) 2014 Robert Jarzmik
6 *
7 * Common clock code for PXA clocks ("CKEN" type clocks + DT)
8 */

--- 81 unchanged lines hidden (view full) ---

90 const char *dev_id, struct clk *clk)
91{
92 if (!IS_ERR(clk) && (ckid != CLK_NONE))
93 pxa_clocks[ckid] = clk;
94 if (!IS_ERR(clk))
95 clk_register_clkdev(clk, con_id, dev_id);
96}
97
98int __init clk_pxa_cken_init(const struct desc_clk_cken *clks, int nb_clks)
98int __init clk_pxa_cken_init(const struct desc_clk_cken *clks,
99 int nb_clks, void __iomem *clk_regs)
99{
100 int i;
101 struct pxa_clk *pxa_clk;
102 struct clk *clk;
103
104 for (i = 0; i < nb_clks; i++) {
105 pxa_clk = kzalloc(sizeof(*pxa_clk), GFP_KERNEL);
106 pxa_clk->is_in_low_power = clks[i].is_in_low_power;
107 pxa_clk->lp = clks[i].lp;
108 pxa_clk->hp = clks[i].hp;
109 pxa_clk->gate = clks[i].gate;
100{
101 int i;
102 struct pxa_clk *pxa_clk;
103 struct clk *clk;
104
105 for (i = 0; i < nb_clks; i++) {
106 pxa_clk = kzalloc(sizeof(*pxa_clk), GFP_KERNEL);
107 pxa_clk->is_in_low_power = clks[i].is_in_low_power;
108 pxa_clk->lp = clks[i].lp;
109 pxa_clk->hp = clks[i].hp;
110 pxa_clk->gate = clks[i].gate;
111 pxa_clk->gate.reg = clk_regs + clks[i].cken_reg;
110 pxa_clk->gate.lock = &pxa_clk_lock;
111 clk = clk_register_composite(NULL, clks[i].name,
112 clks[i].parent_names, 2,
113 &pxa_clk->hw, &cken_mux_ops,
114 &pxa_clk->hw, &cken_rate_ops,
115 &pxa_clk->gate.hw, &clk_gate_ops,
116 clks[i].flags);
117 clkdev_pxa_register(clks[i].ckid, clks[i].con_id,

--- 129 unchanged lines hidden --- 		112 pxa_clk->gate.lock = &pxa_clk_lock;
113 clk = clk_register_composite(NULL, clks[i].name,
114 clks[i].parent_names, 2,
115 &pxa_clk->hw, &cken_mux_ops,
116 &pxa_clk->hw, &cken_rate_ops,
117 &pxa_clk->gate.hw, &clk_gate_ops,
118 clks[i].flags);
119 clkdev_pxa_register(clks[i].ckid, clks[i].con_id,

--- 129 unchanged lines hidden ---