clk-peripheral.c (9a87ffc99ec8eb8d35eed7c4f816d75f5cc9662e) clk-peripheral.c (c2f2ca0be8a62ce61a6878cd3dddd8fc6d622999)
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
4 */
5
6#include <linux/bitops.h>
7#include <linux/clk-provider.h>
8#include <linux/clkdev.h>

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92static const struct clk_ops peripheral_ops = {
93 .enable = clk_peripheral_enable,
94 .disable = clk_peripheral_disable,
95 .is_enabled = clk_peripheral_is_enabled,
96};
97
98struct clk_hw * __init
99at91_clk_register_peripheral(struct regmap *regmap, const char *name,
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
4 */
5
6#include <linux/bitops.h>
7#include <linux/clk-provider.h>
8#include <linux/clkdev.h>

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92static const struct clk_ops peripheral_ops = {
93 .enable = clk_peripheral_enable,
94 .disable = clk_peripheral_disable,
95 .is_enabled = clk_peripheral_is_enabled,
96};
97
98struct clk_hw * __init
99at91_clk_register_peripheral(struct regmap *regmap, const char *name,
100 const char *parent_name, u32 id)
100 const char *parent_name, struct clk_hw *parent_hw,
101 u32 id)
101{
102 struct clk_peripheral *periph;
102{
103 struct clk_peripheral *periph;
103 struct clk_init_data init;
104 struct clk_init_data init = {};
104 struct clk_hw *hw;
105 int ret;
106
105 struct clk_hw *hw;
106 int ret;
107
107 if (!name || !parent_name || id > PERIPHERAL_ID_MAX)
108 if (!name || !(parent_name || parent_hw) || id > PERIPHERAL_ID_MAX)
108 return ERR_PTR(-EINVAL);
109
110 periph = kzalloc(sizeof(*periph), GFP_KERNEL);
111 if (!periph)
112 return ERR_PTR(-ENOMEM);
113
114 init.name = name;
115 init.ops = &peripheral_ops;
109 return ERR_PTR(-EINVAL);
110
111 periph = kzalloc(sizeof(*periph), GFP_KERNEL);
112 if (!periph)
113 return ERR_PTR(-ENOMEM);
114
115 init.name = name;
116 init.ops = &peripheral_ops;
116 init.parent_names = &parent_name;
117 if (parent_hw)
118 init.parent_hws = (const struct clk_hw **)&parent_hw;
119 else
120 init.parent_names = &parent_name;
117 init.num_parents = 1;
118 init.flags = 0;
119
120 periph->id = id;
121 periph->hw.init = &init;
122 periph->regmap = regmap;
123
124 hw = &periph->hw;

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439 .save_context = clk_sam9x5_peripheral_save_context,
440 .restore_context = clk_sam9x5_peripheral_restore_context,
441};
442
443struct clk_hw * __init
444at91_clk_register_sam9x5_peripheral(struct regmap *regmap, spinlock_t *lock,
445 const struct clk_pcr_layout *layout,
446 const char *name, const char *parent_name,
121 init.num_parents = 1;
122 init.flags = 0;
123
124 periph->id = id;
125 periph->hw.init = &init;
126 periph->regmap = regmap;
127
128 hw = &periph->hw;

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443 .save_context = clk_sam9x5_peripheral_save_context,
444 .restore_context = clk_sam9x5_peripheral_restore_context,
445};
446
447struct clk_hw * __init
448at91_clk_register_sam9x5_peripheral(struct regmap *regmap, spinlock_t *lock,
449 const struct clk_pcr_layout *layout,
450 const char *name, const char *parent_name,
451 struct clk_hw *parent_hw,
447 u32 id, const struct clk_range *range,
448 int chg_pid, unsigned long flags)
449{
450 struct clk_sam9x5_peripheral *periph;
452 u32 id, const struct clk_range *range,
453 int chg_pid, unsigned long flags)
454{
455 struct clk_sam9x5_peripheral *periph;
451 struct clk_init_data init;
456 struct clk_init_data init = {};
452 struct clk_hw *hw;
453 int ret;
454
457 struct clk_hw *hw;
458 int ret;
459
455 if (!name || !parent_name)
460 if (!name || !(parent_name || parent_hw))
456 return ERR_PTR(-EINVAL);
457
458 periph = kzalloc(sizeof(*periph), GFP_KERNEL);
459 if (!periph)
460 return ERR_PTR(-ENOMEM);
461
462 init.name = name;
461 return ERR_PTR(-EINVAL);
462
463 periph = kzalloc(sizeof(*periph), GFP_KERNEL);
464 if (!periph)
465 return ERR_PTR(-ENOMEM);
466
467 init.name = name;
463 init.parent_names = &parent_name;
468 if (parent_hw)
469 init.parent_hws = (const struct clk_hw **)&parent_hw;
470 else
471 init.parent_names = &parent_name;
464 init.num_parents = 1;
465 init.flags = flags;
466 if (chg_pid < 0) {
467 init.ops = &sam9x5_peripheral_ops;
468 } else {
469 init.flags |= CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
470 CLK_SET_RATE_PARENT;
471 init.ops = &sam9x5_peripheral_chg_ops;

--- 24 unchanged lines hidden --- 		472 init.num_parents = 1;
473 init.flags = flags;
474 if (chg_pid < 0) {
475 init.ops = &sam9x5_peripheral_ops;
476 } else {
477 init.flags |= CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
478 CLK_SET_RATE_PARENT;
479 init.ops = &sam9x5_peripheral_chg_ops;

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