regcache.c (e466de05194b666114713b753e2f4be1d4200140) regcache.c (bacdbe077342ecc9e7b3e374cc5a41995116706a)
1/*
2 * Register cache access API
3 *
4 * Copyright 2011 Wolfson Microelectronics plc
5 *
6 * Author: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify

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259{
260 int ret = 0;
261 unsigned int i;
262 const char *name;
263 unsigned int bypass;
264
265 BUG_ON(!map->cache_ops || !map->cache_ops->sync);
266
1/*
2 * Register cache access API
3 *
4 * Copyright 2011 Wolfson Microelectronics plc
5 *
6 * Author: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify

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259{
260 int ret = 0;
261 unsigned int i;
262 const char *name;
263 unsigned int bypass;
264
265 BUG_ON(!map->cache_ops || !map->cache_ops->sync);
266
267 mutex_lock(&map->lock);
267 map->lock(map);
268 /* Remember the initial bypass state */
269 bypass = map->cache_bypass;
270 dev_dbg(map->dev, "Syncing %s cache\n",
271 map->cache_ops->name);
272 name = map->cache_ops->name;
273 trace_regcache_sync(map->dev, name, "start");
274
275 if (!map->cache_dirty)

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291
292 if (ret == 0)
293 map->cache_dirty = false;
294
295out:
296 trace_regcache_sync(map->dev, name, "stop");
297 /* Restore the bypass state */
298 map->cache_bypass = bypass;
268 /* Remember the initial bypass state */
269 bypass = map->cache_bypass;
270 dev_dbg(map->dev, "Syncing %s cache\n",
271 map->cache_ops->name);
272 name = map->cache_ops->name;
273 trace_regcache_sync(map->dev, name, "start");
274
275 if (!map->cache_dirty)

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291
292 if (ret == 0)
293 map->cache_dirty = false;
294
295out:
296 trace_regcache_sync(map->dev, name, "stop");
297 /* Restore the bypass state */
298 map->cache_bypass = bypass;
299 mutex_unlock(&map->lock);
299 map->unlock(map);
300
301 return ret;
302}
303EXPORT_SYMBOL_GPL(regcache_sync);
304
305/**
306 * regcache_sync_region: Sync part of the register cache with the hardware.
307 *

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318 unsigned int max)
319{
320 int ret = 0;
321 const char *name;
322 unsigned int bypass;
323
324 BUG_ON(!map->cache_ops || !map->cache_ops->sync);
325
300
301 return ret;
302}
303EXPORT_SYMBOL_GPL(regcache_sync);
304
305/**
306 * regcache_sync_region: Sync part of the register cache with the hardware.
307 *

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318 unsigned int max)
319{
320 int ret = 0;
321 const char *name;
322 unsigned int bypass;
323
324 BUG_ON(!map->cache_ops || !map->cache_ops->sync);
325
326 mutex_lock(&map->lock);
326 map->lock(map);
327
328 /* Remember the initial bypass state */
329 bypass = map->cache_bypass;
330
331 name = map->cache_ops->name;
332 dev_dbg(map->dev, "Syncing %s cache from %d-%d\n", name, min, max);
333
334 trace_regcache_sync(map->dev, name, "start region");
335
336 if (!map->cache_dirty)
337 goto out;
338
339 ret = map->cache_ops->sync(map, min, max);
340
341out:
342 trace_regcache_sync(map->dev, name, "stop region");
343 /* Restore the bypass state */
344 map->cache_bypass = bypass;
327
328 /* Remember the initial bypass state */
329 bypass = map->cache_bypass;
330
331 name = map->cache_ops->name;
332 dev_dbg(map->dev, "Syncing %s cache from %d-%d\n", name, min, max);
333
334 trace_regcache_sync(map->dev, name, "start region");
335
336 if (!map->cache_dirty)
337 goto out;
338
339 ret = map->cache_ops->sync(map, min, max);
340
341out:
342 trace_regcache_sync(map->dev, name, "stop region");
343 /* Restore the bypass state */
344 map->cache_bypass = bypass;
345 mutex_unlock(&map->lock);
345 map->unlock(map);
346
347 return ret;
348}
346
347 return ret;
348}
349EXPORT_SYMBOL_GPL(regcache_sync_region);
350
351/**
352 * regcache_cache_only: Put a register map into cache only mode
353 *
354 * @map: map to configure
355 * @cache_only: flag if changes should be written to the hardware
356 *
357 * When a register map is marked as cache only writes to the register
358 * map API will only update the register cache, they will not cause
359 * any hardware changes. This is useful for allowing portions of
360 * drivers to act as though the device were functioning as normal when
361 * it is disabled for power saving reasons.
362 */
363void regcache_cache_only(struct regmap *map, bool enable)
364{
349
350/**
351 * regcache_cache_only: Put a register map into cache only mode
352 *
353 * @map: map to configure
354 * @cache_only: flag if changes should be written to the hardware
355 *
356 * When a register map is marked as cache only writes to the register
357 * map API will only update the register cache, they will not cause
358 * any hardware changes. This is useful for allowing portions of
359 * drivers to act as though the device were functioning as normal when
360 * it is disabled for power saving reasons.
361 */
362void regcache_cache_only(struct regmap *map, bool enable)
363{
365 mutex_lock(&map->lock);
364 map->lock(map);
366 WARN_ON(map->cache_bypass && enable);
367 map->cache_only = enable;
368 trace_regmap_cache_only(map->dev, enable);
365 WARN_ON(map->cache_bypass && enable);
366 map->cache_only = enable;
367 trace_regmap_cache_only(map->dev, enable);
369 mutex_unlock(&map->lock);
368 map->unlock(map);
370}
371EXPORT_SYMBOL_GPL(regcache_cache_only);
372
373/**
374 * regcache_mark_dirty: Mark the register cache as dirty
375 *
376 * @map: map to mark
377 *
378 * Mark the register cache as dirty, for example due to the device
379 * having been powered down for suspend. If the cache is not marked
380 * as dirty then the cache sync will be suppressed.
381 */
382void regcache_mark_dirty(struct regmap *map)
383{
369}
370EXPORT_SYMBOL_GPL(regcache_cache_only);
371
372/**
373 * regcache_mark_dirty: Mark the register cache as dirty
374 *
375 * @map: map to mark
376 *
377 * Mark the register cache as dirty, for example due to the device
378 * having been powered down for suspend. If the cache is not marked
379 * as dirty then the cache sync will be suppressed.
380 */
381void regcache_mark_dirty(struct regmap *map)
382{
384 mutex_lock(&map->lock);
383 map->lock(map);
385 map->cache_dirty = true;
384 map->cache_dirty = true;
386 mutex_unlock(&map->lock);
385 map->unlock(map);
387}
388EXPORT_SYMBOL_GPL(regcache_mark_dirty);
389
390/**
391 * regcache_cache_bypass: Put a register map into cache bypass mode
392 *
393 * @map: map to configure
394 * @cache_bypass: flag if changes should not be written to the hardware
395 *
396 * When a register map is marked with the cache bypass option, writes
397 * to the register map API will only update the hardware and not the
398 * the cache directly. This is useful when syncing the cache back to
399 * the hardware.
400 */
401void regcache_cache_bypass(struct regmap *map, bool enable)
402{
386}
387EXPORT_SYMBOL_GPL(regcache_mark_dirty);
388
389/**
390 * regcache_cache_bypass: Put a register map into cache bypass mode
391 *
392 * @map: map to configure
393 * @cache_bypass: flag if changes should not be written to the hardware
394 *
395 * When a register map is marked with the cache bypass option, writes
396 * to the register map API will only update the hardware and not the
397 * the cache directly. This is useful when syncing the cache back to
398 * the hardware.
399 */
400void regcache_cache_bypass(struct regmap *map, bool enable)
401{
403 mutex_lock(&map->lock);
402 map->lock(map);
404 WARN_ON(map->cache_only && enable);
405 map->cache_bypass = enable;
406 trace_regmap_cache_bypass(map->dev, enable);
403 WARN_ON(map->cache_only && enable);
404 map->cache_bypass = enable;
405 trace_regmap_cache_bypass(map->dev, enable);
407 mutex_unlock(&map->lock);
406 map->unlock(map);
408}
409EXPORT_SYMBOL_GPL(regcache_cache_bypass);
410
411bool regcache_set_val(void *base, unsigned int idx,
412 unsigned int val, unsigned int word_size)
413{
414 switch (word_size) {
415 case 1: {

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408EXPORT_SYMBOL_GPL(regcache_cache_bypass);
409
410bool regcache_set_val(void *base, unsigned int idx,
411 unsigned int val, unsigned int word_size)
412{
413 switch (word_size) {
414 case 1: {

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