| sata_sil24.c (036db8bd96374c66424f270f3370ddaf0adf7506) | sata_sil24.c (4e5b6260cc9ba84ec127f948173ff7d87581f029) |
|---|---|
| 1/* 2 * sata_sil24.c - Driver for Silicon Image 3124/3132 SATA-2 controllers 3 * 4 * Copyright 2005 Tejun Heo 5 * 6 * Based on preview driver from Silicon Image. 7 * 8 * This program is free software; you can redistribute it and/or modify it --- 271 unchanged lines hidden (view full) --- 280 "device error via SDB FIS" }, 281 [PORT_CERR_DATA] = { AC_ERR_ATA_BUS, ATA_EH_RESET, 282 "error in data FIS" }, 283 [PORT_CERR_SEND] = { AC_ERR_ATA_BUS, ATA_EH_RESET, 284 "failed to transmit command FIS" }, 285 [PORT_CERR_INCONSISTENT] = { AC_ERR_HSM, ATA_EH_RESET, 286 "protocol mismatch" }, 287 [PORT_CERR_DIRECTION] = { AC_ERR_HSM, ATA_EH_RESET, | 1/* 2 * sata_sil24.c - Driver for Silicon Image 3124/3132 SATA-2 controllers 3 * 4 * Copyright 2005 Tejun Heo 5 * 6 * Based on preview driver from Silicon Image. 7 * 8 * This program is free software; you can redistribute it and/or modify it --- 271 unchanged lines hidden (view full) --- 280 "device error via SDB FIS" }, 281 [PORT_CERR_DATA] = { AC_ERR_ATA_BUS, ATA_EH_RESET, 282 "error in data FIS" }, 283 [PORT_CERR_SEND] = { AC_ERR_ATA_BUS, ATA_EH_RESET, 284 "failed to transmit command FIS" }, 285 [PORT_CERR_INCONSISTENT] = { AC_ERR_HSM, ATA_EH_RESET, 286 "protocol mismatch" }, 287 [PORT_CERR_DIRECTION] = { AC_ERR_HSM, ATA_EH_RESET, |
| 288 "data direction mismatch" }, | 288 "data directon mismatch" }, |
| 289 [PORT_CERR_UNDERRUN] = { AC_ERR_HSM, ATA_EH_RESET, 290 "ran out of SGEs while writing" }, 291 [PORT_CERR_OVERRUN] = { AC_ERR_HSM, ATA_EH_RESET, 292 "ran out of SGEs while reading" }, 293 [PORT_CERR_PKT_PROT] = { AC_ERR_HSM, ATA_EH_RESET, | 289 [PORT_CERR_UNDERRUN] = { AC_ERR_HSM, ATA_EH_RESET, 290 "ran out of SGEs while writing" }, 291 [PORT_CERR_OVERRUN] = { AC_ERR_HSM, ATA_EH_RESET, 292 "ran out of SGEs while reading" }, 293 [PORT_CERR_PKT_PROT] = { AC_ERR_HSM, ATA_EH_RESET, |
| 294 "invalid data direction for ATAPI CDB" }, | 294 "invalid data directon for ATAPI CDB" }, |
| 295 [PORT_CERR_SGT_BOUNDARY] = { AC_ERR_SYSTEM, ATA_EH_RESET, 296 "SGT not on qword boundary" }, 297 [PORT_CERR_SGT_TGTABRT] = { AC_ERR_HOST_BUS, ATA_EH_RESET, 298 "PCI target abort while fetching SGT" }, 299 [PORT_CERR_SGT_MSTABRT] = { AC_ERR_HOST_BUS, ATA_EH_RESET, 300 "PCI master abort while fetching SGT" }, 301 [PORT_CERR_SGT_PCIPERR] = { AC_ERR_HOST_BUS, ATA_EH_RESET, 302 "PCI parity error while fetching SGT" }, --- 541 unchanged lines hidden (view full) --- 844{ 845 struct ata_port *ap = qc->ap; 846 struct sil24_port_priv *pp = ap->private_data; 847 union sil24_cmd_block *cb; 848 struct sil24_prb *prb; 849 struct sil24_sge *sge; 850 u16 ctrl = 0; 851 | 295 [PORT_CERR_SGT_BOUNDARY] = { AC_ERR_SYSTEM, ATA_EH_RESET, 296 "SGT not on qword boundary" }, 297 [PORT_CERR_SGT_TGTABRT] = { AC_ERR_HOST_BUS, ATA_EH_RESET, 298 "PCI target abort while fetching SGT" }, 299 [PORT_CERR_SGT_MSTABRT] = { AC_ERR_HOST_BUS, ATA_EH_RESET, 300 "PCI master abort while fetching SGT" }, 301 [PORT_CERR_SGT_PCIPERR] = { AC_ERR_HOST_BUS, ATA_EH_RESET, 302 "PCI parity error while fetching SGT" }, --- 541 unchanged lines hidden (view full) --- 844{ 845 struct ata_port *ap = qc->ap; 846 struct sil24_port_priv *pp = ap->private_data; 847 union sil24_cmd_block *cb; 848 struct sil24_prb *prb; 849 struct sil24_sge *sge; 850 u16 ctrl = 0; 851 |
| 852 cb = &pp->cmd_block[sil24_tag(qc->tag)]; | 852 cb = &pp->cmd_block[sil24_tag(qc->hw_tag)]; |
| 853 854 if (!ata_is_atapi(qc->tf.protocol)) { 855 prb = &cb->ata.prb; 856 sge = cb->ata.sge; 857 if (ata_is_data(qc->tf.protocol)) { 858 u16 prot = 0; 859 ctrl = PRB_CTRL_PROTOCOL; 860 if (ata_is_ncq(qc->tf.protocol)) --- 25 unchanged lines hidden (view full) --- 886 sil24_fill_sg(qc, sge); 887} 888 889static unsigned int sil24_qc_issue(struct ata_queued_cmd *qc) 890{ 891 struct ata_port *ap = qc->ap; 892 struct sil24_port_priv *pp = ap->private_data; 893 void __iomem *port = sil24_port_base(ap); | 853 854 if (!ata_is_atapi(qc->tf.protocol)) { 855 prb = &cb->ata.prb; 856 sge = cb->ata.sge; 857 if (ata_is_data(qc->tf.protocol)) { 858 u16 prot = 0; 859 ctrl = PRB_CTRL_PROTOCOL; 860 if (ata_is_ncq(qc->tf.protocol)) --- 25 unchanged lines hidden (view full) --- 886 sil24_fill_sg(qc, sge); 887} 888 889static unsigned int sil24_qc_issue(struct ata_queued_cmd *qc) 890{ 891 struct ata_port *ap = qc->ap; 892 struct sil24_port_priv *pp = ap->private_data; 893 void __iomem *port = sil24_port_base(ap); |
| 894 unsigned int tag = sil24_tag(qc->tag); | 894 unsigned int tag = sil24_tag(qc->hw_tag); |
| 895 dma_addr_t paddr; 896 void __iomem *activate; 897 898 paddr = pp->cmd_block_dma + tag * sizeof(*pp->cmd_block); 899 activate = port + PORT_CMD_ACTIVATE + tag * 8; 900 901 /* 902 * The barrier is required to ensure that writes to cmd_block reach 903 * the memory before the write to PORT_CMD_ACTIVATE. 904 */ 905 wmb(); 906 writel((u32)paddr, activate); 907 writel((u64)paddr >> 32, activate + 4); 908 909 return 0; 910} 911 912static bool sil24_qc_fill_rtf(struct ata_queued_cmd *qc) 913{ | 895 dma_addr_t paddr; 896 void __iomem *activate; 897 898 paddr = pp->cmd_block_dma + tag * sizeof(*pp->cmd_block); 899 activate = port + PORT_CMD_ACTIVATE + tag * 8; 900 901 /* 902 * The barrier is required to ensure that writes to cmd_block reach 903 * the memory before the write to PORT_CMD_ACTIVATE. 904 */ 905 wmb(); 906 writel((u32)paddr, activate); 907 writel((u64)paddr >> 32, activate + 4); 908 909 return 0; 910} 911 912static bool sil24_qc_fill_rtf(struct ata_queued_cmd *qc) 913{ |
| 914 sil24_read_tf(qc->ap, qc->tag, &qc->result_tf); | 914 sil24_read_tf(qc->ap, qc->hw_tag, &qc->result_tf); |
| 915 return true; 916} 917 918static void sil24_pmp_attach(struct ata_port *ap) 919{ 920 u32 *gscr = ap->link.device->gscr; 921 922 sil24_config_pmp(ap, 1); --- 469 unchanged lines hidden --- | 915 return true; 916} 917 918static void sil24_pmp_attach(struct ata_port *ap) 919{ 920 u32 *gscr = ap->link.device->gscr; 921 922 sil24_config_pmp(ap, 1); --- 469 unchanged lines hidden --- |