sata_mv.c (804b3f9a16e446cb023417faec58b6506c834052) sata_mv.c (baf14aa14efcfdb5a74d5cf804691086c6bec743)
1/*
2 * sata_mv.c - Marvell SATA support
3 *
4 * Copyright 2005: EMC Corporation, all rights reserved.
5 * Copyright 2005 Red Hat, Inc. All rights reserved.
6 *
7 * Please ALWAYS copy linux-ide@vger.kernel.org on emails.
8 *

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308 MV_PP_FLAG_HAD_A_RESET = (1 << 2), /* 1st hard reset complete? */
309};
310
311#define IS_GEN_I(hpriv) ((hpriv)->hp_flags & MV_HP_GEN_I)
312#define IS_GEN_II(hpriv) ((hpriv)->hp_flags & MV_HP_GEN_II)
313#define IS_GEN_IIE(hpriv) ((hpriv)->hp_flags & MV_HP_GEN_IIE)
314
315enum {
1/*
2 * sata_mv.c - Marvell SATA support
3 *
4 * Copyright 2005: EMC Corporation, all rights reserved.
5 * Copyright 2005 Red Hat, Inc. All rights reserved.
6 *
7 * Please ALWAYS copy linux-ide@vger.kernel.org on emails.
8 *

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308 MV_PP_FLAG_HAD_A_RESET = (1 << 2), /* 1st hard reset complete? */
309};
310
311#define IS_GEN_I(hpriv) ((hpriv)->hp_flags & MV_HP_GEN_I)
312#define IS_GEN_II(hpriv) ((hpriv)->hp_flags & MV_HP_GEN_II)
313#define IS_GEN_IIE(hpriv) ((hpriv)->hp_flags & MV_HP_GEN_IIE)
314
315enum {
316 MV_DMA_BOUNDARY = 0xffffffffU,
316 /* DMA boundary 0xffff is required by the s/g splitting
317 * we need on /length/ in mv_fill-sg().
318 */
319 MV_DMA_BOUNDARY = 0xffffU,
317
318 /* mask of register bits containing lower 32 bits
319 * of EDMA request queue DMA address
320 */
321 EDMA_REQ_Q_BASE_LO_MASK = 0xfffffc00U,
322
323 /* ditto, for response queue */
324 EDMA_RSP_Q_BASE_LO_MASK = 0xffffff00U,

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443
444static struct scsi_host_template mv5_sht = {
445 .module = THIS_MODULE,
446 .name = DRV_NAME,
447 .ioctl = ata_scsi_ioctl,
448 .queuecommand = ata_scsi_queuecmd,
449 .can_queue = ATA_DEF_QUEUE,
450 .this_id = ATA_SHT_THIS_ID,
320
321 /* mask of register bits containing lower 32 bits
322 * of EDMA request queue DMA address
323 */
324 EDMA_REQ_Q_BASE_LO_MASK = 0xfffffc00U,
325
326 /* ditto, for response queue */
327 EDMA_RSP_Q_BASE_LO_MASK = 0xffffff00U,

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446
447static struct scsi_host_template mv5_sht = {
448 .module = THIS_MODULE,
449 .name = DRV_NAME,
450 .ioctl = ata_scsi_ioctl,
451 .queuecommand = ata_scsi_queuecmd,
452 .can_queue = ATA_DEF_QUEUE,
453 .this_id = ATA_SHT_THIS_ID,
451 .sg_tablesize = MV_MAX_SG_CT,
454 .sg_tablesize = MV_MAX_SG_CT / 2,
452 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
453 .emulated = ATA_SHT_EMULATED,
454 .use_clustering = 1,
455 .proc_name = DRV_NAME,
456 .dma_boundary = MV_DMA_BOUNDARY,
457 .slave_configure = ata_scsi_slave_config,
458 .slave_destroy = ata_scsi_slave_destroy,
459 .bios_param = ata_std_bios_param,
460};
461
462static struct scsi_host_template mv6_sht = {
463 .module = THIS_MODULE,
464 .name = DRV_NAME,
465 .ioctl = ata_scsi_ioctl,
466 .queuecommand = ata_scsi_queuecmd,
467 .can_queue = ATA_DEF_QUEUE,
468 .this_id = ATA_SHT_THIS_ID,
455 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
456 .emulated = ATA_SHT_EMULATED,
457 .use_clustering = 1,
458 .proc_name = DRV_NAME,
459 .dma_boundary = MV_DMA_BOUNDARY,
460 .slave_configure = ata_scsi_slave_config,
461 .slave_destroy = ata_scsi_slave_destroy,
462 .bios_param = ata_std_bios_param,
463};
464
465static struct scsi_host_template mv6_sht = {
466 .module = THIS_MODULE,
467 .name = DRV_NAME,
468 .ioctl = ata_scsi_ioctl,
469 .queuecommand = ata_scsi_queuecmd,
470 .can_queue = ATA_DEF_QUEUE,
471 .this_id = ATA_SHT_THIS_ID,
469 .sg_tablesize = MV_MAX_SG_CT,
472 .sg_tablesize = MV_MAX_SG_CT / 2,
470 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
471 .emulated = ATA_SHT_EMULATED,
472 .use_clustering = 1,
473 .proc_name = DRV_NAME,
474 .dma_boundary = MV_DMA_BOUNDARY,
475 .slave_configure = ata_scsi_slave_config,
476 .slave_destroy = ata_scsi_slave_destroy,
477 .bios_param = ata_std_bios_param,

--- 2267 unchanged lines hidden --- 		473 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
474 .emulated = ATA_SHT_EMULATED,
475 .use_clustering = 1,
476 .proc_name = DRV_NAME,
477 .dma_boundary = MV_DMA_BOUNDARY,
478 .slave_configure = ata_scsi_slave_config,
479 .slave_destroy = ata_scsi_slave_destroy,
480 .bios_param = ata_std_bios_param,

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