libahci.c (036db8bd96374c66424f270f3370ddaf0adf7506) libahci.c (4e5b6260cc9ba84ec127f948173ff7d87581f029)
1/*
2 * libahci.c - Common AHCI SATA low-level routines
3 *
4 * Maintained by: Tejun Heo <tj@kernel.org>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2004-2005 Red Hat, Inc.

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555 hpriv->cap = cap;
556 hpriv->cap2 = cap2;
557 hpriv->version = readl(mmio + HOST_VERSION);
558 hpriv->port_map = port_map;
559
560 if (!hpriv->start_engine)
561 hpriv->start_engine = ahci_start_engine;
562
1/*
2 * libahci.c - Common AHCI SATA low-level routines
3 *
4 * Maintained by: Tejun Heo <tj@kernel.org>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2004-2005 Red Hat, Inc.

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555 hpriv->cap = cap;
556 hpriv->cap2 = cap2;
557 hpriv->version = readl(mmio + HOST_VERSION);
558 hpriv->port_map = port_map;
559
560 if (!hpriv->start_engine)
561 hpriv->start_engine = ahci_start_engine;
562
563 if (!hpriv->stop_engine)
564 hpriv->stop_engine = ahci_stop_engine;
565
566 if (!hpriv->irq_handler)
567 hpriv->irq_handler = ahci_single_level_irq_intr;
568}
569EXPORT_SYMBOL_GPL(ahci_save_initial_config);
570
571/**
572 * ahci_restore_initial_config - Restore initial config
573 * @host: target ATA host

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895 ata_for_each_link(link, ap, EDGE)
896 ahci_init_sw_activity(link);
897
898}
899
900static int ahci_deinit_port(struct ata_port *ap, const char **emsg)
901{
902 int rc;
563 if (!hpriv->irq_handler)
564 hpriv->irq_handler = ahci_single_level_irq_intr;
565}
566EXPORT_SYMBOL_GPL(ahci_save_initial_config);
567
568/**
569 * ahci_restore_initial_config - Restore initial config
570 * @host: target ATA host

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892 ata_for_each_link(link, ap, EDGE)
893 ahci_init_sw_activity(link);
894
895}
896
897static int ahci_deinit_port(struct ata_port *ap, const char **emsg)
898{
899 int rc;
903 struct ahci_host_priv *hpriv = ap->host->private_data;
904
905 /* disable DMA */
900
901 /* disable DMA */
906 rc = hpriv->stop_engine(ap);
902 rc = ahci_stop_engine(ap);
907 if (rc) {
908 *emsg = "failed to stop engine";
909 return rc;
910 }
911
912 /* disable FIS reception */
913 rc = ahci_stop_fis_rx(ap);
914 if (rc) {

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1309{
1310 void __iomem *port_mmio = ahci_port_base(ap);
1311 struct ahci_host_priv *hpriv = ap->host->private_data;
1312 u8 status = readl(port_mmio + PORT_TFDATA) & 0xFF;
1313 u32 tmp;
1314 int busy, rc;
1315
1316 /* stop engine */
903 if (rc) {
904 *emsg = "failed to stop engine";
905 return rc;
906 }
907
908 /* disable FIS reception */
909 rc = ahci_stop_fis_rx(ap);
910 if (rc) {

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1305{
1306 void __iomem *port_mmio = ahci_port_base(ap);
1307 struct ahci_host_priv *hpriv = ap->host->private_data;
1308 u8 status = readl(port_mmio + PORT_TFDATA) & 0xFF;
1309 u32 tmp;
1310 int busy, rc;
1311
1312 /* stop engine */
1317 rc = hpriv->stop_engine(ap);
1313 rc = ahci_stop_engine(ap);
1318 if (rc)
1319 goto out_restart;
1320
1321 /* need to do CLO?
1322 * always do CLO if PMP is attached (AHCI-1.3 9.2)
1323 */
1324 busy = status & (ATA_BUSY | ATA_DRQ);
1325 if (!busy && !sata_pmp_attached(ap)) {

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1548 struct ahci_port_priv *pp = ap->private_data;
1549 struct ahci_host_priv *hpriv = ap->host->private_data;
1550 u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG;
1551 struct ata_taskfile tf;
1552 int rc;
1553
1554 DPRINTK("ENTER\n");
1555
1314 if (rc)
1315 goto out_restart;
1316
1317 /* need to do CLO?
1318 * always do CLO if PMP is attached (AHCI-1.3 9.2)
1319 */
1320 busy = status & (ATA_BUSY | ATA_DRQ);
1321 if (!busy && !sata_pmp_attached(ap)) {

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1544 struct ahci_port_priv *pp = ap->private_data;
1545 struct ahci_host_priv *hpriv = ap->host->private_data;
1546 u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG;
1547 struct ata_taskfile tf;
1548 int rc;
1549
1550 DPRINTK("ENTER\n");
1551
1556 hpriv->stop_engine(ap);
1552 ahci_stop_engine(ap);
1557
1558 /* clear D2H reception area to properly wait for D2H FIS */
1559 ata_tf_init(link->device, &tf);
1560 tf.command = ATA_BUSY;
1561 ata_tf_to_fis(&tf, 0, 0, d2h_fis);
1562
1563 rc = sata_link_hardreset(link, timing, deadline, online,
1564 ahci_check_ready);

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1644 u32 opts;
1645 const u32 cmd_fis_len = 5; /* five dwords */
1646 unsigned int n_elem;
1647
1648 /*
1649 * Fill in command table information. First, the header,
1650 * a SATA Register - Host to Device command FIS.
1651 */
1553
1554 /* clear D2H reception area to properly wait for D2H FIS */
1555 ata_tf_init(link->device, &tf);
1556 tf.command = ATA_BUSY;
1557 ata_tf_to_fis(&tf, 0, 0, d2h_fis);
1558
1559 rc = sata_link_hardreset(link, timing, deadline, online,
1560 ahci_check_ready);

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1640 u32 opts;
1641 const u32 cmd_fis_len = 5; /* five dwords */
1642 unsigned int n_elem;
1643
1644 /*
1645 * Fill in command table information. First, the header,
1646 * a SATA Register - Host to Device command FIS.
1647 */
1652 cmd_tbl = pp->cmd_tbl + qc->tag * AHCI_CMD_TBL_SZ;
1648 cmd_tbl = pp->cmd_tbl + qc->hw_tag * AHCI_CMD_TBL_SZ;
1653
1654 ata_tf_to_fis(&qc->tf, qc->dev->link->pmp, 1, cmd_tbl);
1655 if (is_atapi) {
1656 memset(cmd_tbl + AHCI_CMD_TBL_CDB, 0, 32);
1657 memcpy(cmd_tbl + AHCI_CMD_TBL_CDB, qc->cdb, qc->dev->cdb_len);
1658 }
1659
1660 n_elem = 0;

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1665 * Fill in command slot information.
1666 */
1667 opts = cmd_fis_len | n_elem << 16 | (qc->dev->link->pmp << 12);
1668 if (qc->tf.flags & ATA_TFLAG_WRITE)
1669 opts |= AHCI_CMD_WRITE;
1670 if (is_atapi)
1671 opts |= AHCI_CMD_ATAPI | AHCI_CMD_PREFETCH;
1672
1649
1650 ata_tf_to_fis(&qc->tf, qc->dev->link->pmp, 1, cmd_tbl);
1651 if (is_atapi) {
1652 memset(cmd_tbl + AHCI_CMD_TBL_CDB, 0, 32);
1653 memcpy(cmd_tbl + AHCI_CMD_TBL_CDB, qc->cdb, qc->dev->cdb_len);
1654 }
1655
1656 n_elem = 0;

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1661 * Fill in command slot information.
1662 */
1663 opts = cmd_fis_len | n_elem << 16 | (qc->dev->link->pmp << 12);
1664 if (qc->tf.flags & ATA_TFLAG_WRITE)
1665 opts |= AHCI_CMD_WRITE;
1666 if (is_atapi)
1667 opts |= AHCI_CMD_ATAPI | AHCI_CMD_PREFETCH;
1668
1673 ahci_fill_cmd_slot(pp, qc->tag, opts);
1669 ahci_fill_cmd_slot(pp, qc->hw_tag, opts);
1674}
1675
1676static void ahci_fbs_dec_intr(struct ata_port *ap)
1677{
1678 struct ahci_port_priv *pp = ap->private_data;
1679 void __iomem *port_mmio = ahci_port_base(ap);
1680 u32 fbs = readl(port_mmio + PORT_FBS);
1681 int retries = 3;

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2001
2002 /* Keep track of the currently active link. It will be used
2003 * in completion path to determine whether NCQ phase is in
2004 * progress.
2005 */
2006 pp->active_link = qc->dev->link;
2007
2008 if (ata_is_ncq(qc->tf.protocol))
1670}
1671
1672static void ahci_fbs_dec_intr(struct ata_port *ap)
1673{
1674 struct ahci_port_priv *pp = ap->private_data;
1675 void __iomem *port_mmio = ahci_port_base(ap);
1676 u32 fbs = readl(port_mmio + PORT_FBS);
1677 int retries = 3;

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1997
1998 /* Keep track of the currently active link. It will be used
1999 * in completion path to determine whether NCQ phase is in
2000 * progress.
2001 */
2002 pp->active_link = qc->dev->link;
2003
2004 if (ata_is_ncq(qc->tf.protocol))
2009 writel(1 << qc->tag, port_mmio + PORT_SCR_ACT);
2005 writel(1 << qc->hw_tag, port_mmio + PORT_SCR_ACT);
2010
2011 if (pp->fbs_enabled && pp->fbs_last_dev != qc->dev->link->pmp) {
2012 u32 fbs = readl(port_mmio + PORT_FBS);
2013 fbs &= ~(PORT_FBS_DEV_MASK | PORT_FBS_DEC);
2014 fbs |= qc->dev->link->pmp << PORT_FBS_DEV_OFFSET;
2015 writel(fbs, port_mmio + PORT_FBS);
2016 pp->fbs_last_dev = qc->dev->link->pmp;
2017 }
2018
2006
2007 if (pp->fbs_enabled && pp->fbs_last_dev != qc->dev->link->pmp) {
2008 u32 fbs = readl(port_mmio + PORT_FBS);
2009 fbs &= ~(PORT_FBS_DEV_MASK | PORT_FBS_DEC);
2010 fbs |= qc->dev->link->pmp << PORT_FBS_DEV_OFFSET;
2011 writel(fbs, port_mmio + PORT_FBS);
2012 pp->fbs_last_dev = qc->dev->link->pmp;
2013 }
2014
2019 writel(1 << qc->tag, port_mmio + PORT_CMD_ISSUE);
2015 writel(1 << qc->hw_tag, port_mmio + PORT_CMD_ISSUE);
2020
2021 ahci_sw_activity(qc->dev->link);
2022
2023 return 0;
2024}
2025EXPORT_SYMBOL_GPL(ahci_qc_issue);
2026
2027static bool ahci_qc_fill_rtf(struct ata_queued_cmd *qc)

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2074}
2075
2076void ahci_error_handler(struct ata_port *ap)
2077{
2078 struct ahci_host_priv *hpriv = ap->host->private_data;
2079
2080 if (!(ap->pflags & ATA_PFLAG_FROZEN)) {
2081 /* restart engine */
2016
2017 ahci_sw_activity(qc->dev->link);
2018
2019 return 0;
2020}
2021EXPORT_SYMBOL_GPL(ahci_qc_issue);
2022
2023static bool ahci_qc_fill_rtf(struct ata_queued_cmd *qc)

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2070}
2071
2072void ahci_error_handler(struct ata_port *ap)
2073{
2074 struct ahci_host_priv *hpriv = ap->host->private_data;
2075
2076 if (!(ap->pflags & ATA_PFLAG_FROZEN)) {
2077 /* restart engine */
2082 hpriv->stop_engine(ap);
2078 ahci_stop_engine(ap);
2083 hpriv->start_engine(ap);
2084 }
2085
2086 sata_pmp_error_handler(ap);
2087
2088 if (!ata_dev_enabled(ap->link.device))
2079 hpriv->start_engine(ap);
2080 }
2081
2082 sata_pmp_error_handler(ap);
2083
2084 if (!ata_dev_enabled(ap->link.device))
2089 hpriv->stop_engine(ap);
2085 ahci_stop_engine(ap);
2090}
2091EXPORT_SYMBOL_GPL(ahci_error_handler);
2092
2093static void ahci_post_internal_cmd(struct ata_queued_cmd *qc)
2094{
2095 struct ata_port *ap = qc->ap;
2096
2097 /* make DMA engine forget about the failed command */

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2128 return;
2129 }
2130
2131 /* device sleep was already enabled */
2132 if (devslp & PORT_DEVSLP_ADSE)
2133 return;
2134
2135 /* set DITO, MDAT, DETO and enable DevSlp, need to stop engine first */
2086}
2087EXPORT_SYMBOL_GPL(ahci_error_handler);
2088
2089static void ahci_post_internal_cmd(struct ata_queued_cmd *qc)
2090{
2091 struct ata_port *ap = qc->ap;
2092
2093 /* make DMA engine forget about the failed command */

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2124 return;
2125 }
2126
2127 /* device sleep was already enabled */
2128 if (devslp & PORT_DEVSLP_ADSE)
2129 return;
2130
2131 /* set DITO, MDAT, DETO and enable DevSlp, need to stop engine first */
2136 rc = hpriv->stop_engine(ap);
2132 rc = ahci_stop_engine(ap);
2137 if (rc)
2138 return;
2139
2140 dm = (devslp & PORT_DEVSLP_DM_MASK) >> PORT_DEVSLP_DM_OFFSET;
2141 dito = devslp_idle_timeout / (dm + 1);
2142 if (dito > 0x3ff)
2143 dito = 0x3ff;
2144

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2188
2189 fbs = readl(port_mmio + PORT_FBS);
2190 if (fbs & PORT_FBS_EN) {
2191 pp->fbs_enabled = true;
2192 pp->fbs_last_dev = -1; /* initialization */
2193 return;
2194 }
2195
2133 if (rc)
2134 return;
2135
2136 dm = (devslp & PORT_DEVSLP_DM_MASK) >> PORT_DEVSLP_DM_OFFSET;
2137 dito = devslp_idle_timeout / (dm + 1);
2138 if (dito > 0x3ff)
2139 dito = 0x3ff;
2140

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2184
2185 fbs = readl(port_mmio + PORT_FBS);
2186 if (fbs & PORT_FBS_EN) {
2187 pp->fbs_enabled = true;
2188 pp->fbs_last_dev = -1; /* initialization */
2189 return;
2190 }
2191
2196 rc = hpriv->stop_engine(ap);
2192 rc = ahci_stop_engine(ap);
2197 if (rc)
2198 return;
2199
2200 writel(fbs | PORT_FBS_EN, port_mmio + PORT_FBS);
2201 fbs = readl(port_mmio + PORT_FBS);
2202 if (fbs & PORT_FBS_EN) {
2203 dev_info(ap->host->dev, "FBS is enabled\n");
2204 pp->fbs_enabled = true;

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2221 return;
2222
2223 fbs = readl(port_mmio + PORT_FBS);
2224 if ((fbs & PORT_FBS_EN) == 0) {
2225 pp->fbs_enabled = false;
2226 return;
2227 }
2228
2193 if (rc)
2194 return;
2195
2196 writel(fbs | PORT_FBS_EN, port_mmio + PORT_FBS);
2197 fbs = readl(port_mmio + PORT_FBS);
2198 if (fbs & PORT_FBS_EN) {
2199 dev_info(ap->host->dev, "FBS is enabled\n");
2200 pp->fbs_enabled = true;

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2217 return;
2218
2219 fbs = readl(port_mmio + PORT_FBS);
2220 if ((fbs & PORT_FBS_EN) == 0) {
2221 pp->fbs_enabled = false;
2222 return;
2223 }
2224
2229 rc = hpriv->stop_engine(ap);
2225 rc = ahci_stop_engine(ap);
2230 if (rc)
2231 return;
2232
2233 writel(fbs & ~PORT_FBS_EN, port_mmio + PORT_FBS);
2234 fbs = readl(port_mmio + PORT_FBS);
2235 if (fbs & PORT_FBS_EN)
2236 dev_err(ap->host->dev, "Failed to disable FBS\n");
2237 else {

--- 375 unchanged lines hidden --- 		2226 if (rc)
2227 return;
2228
2229 writel(fbs & ~PORT_FBS_EN, port_mmio + PORT_FBS);
2230 fbs = readl(port_mmio + PORT_FBS);
2231 if (fbs & PORT_FBS_EN)
2232 dev_err(ap->host->dev, "Failed to disable FBS\n");
2233 else {

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