| head.S (f615136c06a791364f5afa8b8ba965315a6440f1) | head.S (49b424fedaf88d0fa9913082b8c1ccd012a8a972) |
|---|---|
| 1/* 2 * arch/xtensa/kernel/head.S 3 * 4 * Xtensa Processor startup code. 5 * 6 * This file is subject to the terms and conditions of the GNU General Public 7 * License. See the file "COPYING" in the main directory of this archive 8 * for more details. --- 89 unchanged lines hidden (view full) --- 98#endif 99 .end no-absolute-literals 100 101 l32r a0, .Lstartup 102 jx a0 103 104ENDPROC(_start) 105 | 1/* 2 * arch/xtensa/kernel/head.S 3 * 4 * Xtensa Processor startup code. 5 * 6 * This file is subject to the terms and conditions of the GNU General Public 7 * License. See the file "COPYING" in the main directory of this archive 8 * for more details. --- 89 unchanged lines hidden (view full) --- 98#endif 99 .end no-absolute-literals 100 101 l32r a0, .Lstartup 102 jx a0 103 104ENDPROC(_start) 105 |
| 106 __INIT | 106 __REF |
| 107 .literal_position 108 109ENTRY(_startup) 110 111 /* Set a0 to 0 for the remaining initialization. */ 112 113 movi a0, 0 114 --- 182 unchanged lines hidden (view full) --- 297 movi a4, secondary_start_kernel 298 callx4 a4 299 j should_never_return 300 301#endif /* CONFIG_SMP */ 302 303ENDPROC(_startup) 304 | 107 .literal_position 108 109ENTRY(_startup) 110 111 /* Set a0 to 0 for the remaining initialization. */ 112 113 movi a0, 0 114 --- 182 unchanged lines hidden (view full) --- 297 movi a4, secondary_start_kernel 298 callx4 a4 299 j should_never_return 300 301#endif /* CONFIG_SMP */ 302 303ENDPROC(_startup) 304 |
| 305#ifdef CONFIG_HOTPLUG_CPU 306 307ENTRY(cpu_restart) 308 309#if XCHAL_DCACHE_IS_WRITEBACK 310 ___flush_invalidate_dcache_all a2 a3 311#else 312 ___invalidate_dcache_all a2 a3 313#endif 314 memw 315 movi a2, CCON # MX External Register to Configure Cache 316 movi a3, 0 317 wer a3, a2 318 extw 319 320 rsr a0, prid 321 neg a2, a0 322 movi a3, cpu_start_id 323 s32i a2, a3, 0 324#if XCHAL_DCACHE_IS_WRITEBACK 325 dhwbi a3, 0 326#endif 3271: 328 l32i a2, a3, 0 329 dhi a3, 0 330 bne a2, a0, 1b 331 332 /* 333 * Initialize WB, WS, and clear PS.EXCM (to allow loop instructions). 334 * Set Interrupt Level just below XCHAL_DEBUGLEVEL to allow 335 * xt-gdb to single step via DEBUG exceptions received directly 336 * by ocd. 337 */ 338 movi a1, 1 339 movi a0, 0 340 wsr a1, windowstart 341 wsr a0, windowbase 342 rsync 343 344 movi a1, LOCKLEVEL 345 wsr a1, ps 346 rsync 347 348 j _startup 349 350ENDPROC(cpu_restart) 351 352#endif /* CONFIG_HOTPLUG_CPU */ 353 |
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| 305/* 306 * DATA section 307 */ 308 309 .section ".data.init.refok" 310 .align 4 311ENTRY(start_info) 312 .long init_thread_union + KERNEL_STACK_SIZE --- 14 unchanged lines hidden --- | 354/* 355 * DATA section 356 */ 357 358 .section ".data.init.refok" 359 .align 4 360ENTRY(start_info) 361 .long init_thread_union + KERNEL_STACK_SIZE --- 14 unchanged lines hidden --- |