| align.S (a450dc69dc57e2bd9de5a970f5015502e6950c73) | align.S (c3ef1f4d379cbc79daf80ffb8d43c611da090b82) |
|---|---|
| 1/* 2 * arch/xtensa/kernel/align.S 3 * 4 * Handle unalignment exceptions in kernel space. 5 * 6 * This file is subject to the terms and conditions of the GNU General 7 * Public License. See the file "COPYING" in the main directory of 8 * this archive for more details. 9 * 10 * Copyright (C) 2001 - 2005 Tensilica, Inc. | 1/* 2 * arch/xtensa/kernel/align.S 3 * 4 * Handle unalignment exceptions in kernel space. 5 * 6 * This file is subject to the terms and conditions of the GNU General 7 * Public License. See the file "COPYING" in the main directory of 8 * this archive for more details. 9 * 10 * Copyright (C) 2001 - 2005 Tensilica, Inc. |
| 11 * Copyright (C) 2014 Cadence Design Systems Inc. |
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| 11 * 12 * Rewritten by Chris Zankel <chris@zankel.net> 13 * 14 * Based on work from Joe Taylor <joe@tensilica.com, joetylr@yahoo.com> 15 * and Marc Gauthier <marc@tensilica.com, marc@alimni.uwaterloo.ca> 16 */ 17 18#include <linux/linkage.h> --- 150 unchanged lines hidden (view full) --- 169 s32i a6, a2, PT_AREG6 170 s32i a7, a2, PT_AREG7 171 s32i a8, a2, PT_AREG8 172 173 rsr a0, depc 174 s32i a0, a2, PT_AREG2 175 s32i a3, a2, PT_AREG3 176 | 12 * 13 * Rewritten by Chris Zankel <chris@zankel.net> 14 * 15 * Based on work from Joe Taylor <joe@tensilica.com, joetylr@yahoo.com> 16 * and Marc Gauthier <marc@tensilica.com, marc@alimni.uwaterloo.ca> 17 */ 18 19#include <linux/linkage.h> --- 150 unchanged lines hidden (view full) --- 170 s32i a6, a2, PT_AREG6 171 s32i a7, a2, PT_AREG7 172 s32i a8, a2, PT_AREG8 173 174 rsr a0, depc 175 s32i a0, a2, PT_AREG2 176 s32i a3, a2, PT_AREG3 177 |
| 178 rsr a3, excsave1 179 movi a4, fast_unaligned_fixup 180 s32i a4, a3, EXC_TABLE_FIXUP 181 |
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| 177 /* Keep value of SAR in a0 */ 178 179 rsr a0, sar 180 rsr a8, excvaddr # load unaligned memory address 181 182 /* Now, identify one of the following load/store instructions. 183 * 184 * The only possible danger of a double exception on the --- 240 unchanged lines hidden (view full) --- 425 rfe 426 427 /* We cannot handle this exception. */ 428 429 .extern _kernel_exception 430.Linvalid_instruction_store: 431.Linvalid_instruction: 432 | 182 /* Keep value of SAR in a0 */ 183 184 rsr a0, sar 185 rsr a8, excvaddr # load unaligned memory address 186 187 /* Now, identify one of the following load/store instructions. 188 * 189 * The only possible danger of a double exception on the --- 240 unchanged lines hidden (view full) --- 430 rfe 431 432 /* We cannot handle this exception. */ 433 434 .extern _kernel_exception 435.Linvalid_instruction_store: 436.Linvalid_instruction: 437 |
| 438 movi a4, 0 439 rsr a3, excsave1 440 s32i a4, a3, EXC_TABLE_FIXUP 441 |
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| 433 /* Restore a4...a8 and SAR, set SP, and jump to default exception. */ 434 435 l32i a8, a2, PT_AREG8 436 l32i a7, a2, PT_AREG7 437 l32i a6, a2, PT_AREG6 438 l32i a5, a2, PT_AREG5 439 l32i a4, a2, PT_AREG4 440 wsr a0, sar --- 5 unchanged lines hidden (view full) --- 446 movi a0, _kernel_exception 447 jx a0 448 4491: movi a0, _user_exception 450 jx a0 451 452ENDPROC(fast_unaligned) 453 | 442 /* Restore a4...a8 and SAR, set SP, and jump to default exception. */ 443 444 l32i a8, a2, PT_AREG8 445 l32i a7, a2, PT_AREG7 446 l32i a6, a2, PT_AREG6 447 l32i a5, a2, PT_AREG5 448 l32i a4, a2, PT_AREG4 449 wsr a0, sar --- 5 unchanged lines hidden (view full) --- 455 movi a0, _kernel_exception 456 jx a0 457 4581: movi a0, _user_exception 459 jx a0 460 461ENDPROC(fast_unaligned) 462 |
| 463ENTRY(fast_unaligned_fixup) 464 465 l32i a2, a3, EXC_TABLE_DOUBLE_SAVE 466 wsr a3, excsave1 467 468 l32i a8, a2, PT_AREG8 469 l32i a7, a2, PT_AREG7 470 l32i a6, a2, PT_AREG6 471 l32i a5, a2, PT_AREG5 472 l32i a4, a2, PT_AREG4 473 l32i a0, a2, PT_AREG2 474 xsr a0, depc # restore depc and a0 475 wsr a0, sar 476 477 rsr a0, exccause 478 s32i a0, a2, PT_DEPC # mark as a regular exception 479 480 rsr a0, ps 481 bbsi.l a0, PS_UM_BIT, 1f # jump if user mode 482 483 rsr a0, exccause 484 addx4 a0, a0, a3 # find entry in table 485 l32i a0, a0, EXC_TABLE_FAST_KERNEL # load handler 486 l32i a3, a2, PT_AREG3 487 jx a0 4881: 489 rsr a0, exccause 490 addx4 a0, a0, a3 # find entry in table 491 l32i a0, a0, EXC_TABLE_FAST_USER # load handler 492 l32i a3, a2, PT_AREG3 493 jx a0 494 495ENDPROC(fast_unaligned_fixup) 496 |
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| 454#endif /* XCHAL_UNALIGNED_LOAD_EXCEPTION || XCHAL_UNALIGNED_STORE_EXCEPTION */ | 497#endif /* XCHAL_UNALIGNED_LOAD_EXCEPTION || XCHAL_UNALIGNED_STORE_EXCEPTION */ |