| cpu.c (eadcbfa58ae8693f0d6a0f591d8f51d55cf068e1) | cpu.c (6c690ee1039b251e583fc65b28da30e97d6a7385) |
|---|---|
| 1/* 2 * Suspend support specific for i386/x86-64. 3 * 4 * Distribute under GPLv2 5 * 6 * Copyright (c) 2007 Rafael J. Wysocki <rjw@sisk.pl> 7 * Copyright (c) 2002 Pavel Machek <pavel@ucw.cz> 8 * Copyright (c) 2001 Patrick Mochel <mochel@osdl.org> --- 115 unchanged lines hidden (view full) --- 124 rdmsrl(MSR_EFER, ctxt->efer); 125#endif 126 127 /* 128 * control registers 129 */ 130 ctxt->cr0 = read_cr0(); 131 ctxt->cr2 = read_cr2(); | 1/* 2 * Suspend support specific for i386/x86-64. 3 * 4 * Distribute under GPLv2 5 * 6 * Copyright (c) 2007 Rafael J. Wysocki <rjw@sisk.pl> 7 * Copyright (c) 2002 Pavel Machek <pavel@ucw.cz> 8 * Copyright (c) 2001 Patrick Mochel <mochel@osdl.org> --- 115 unchanged lines hidden (view full) --- 124 rdmsrl(MSR_EFER, ctxt->efer); 125#endif 126 127 /* 128 * control registers 129 */ 130 ctxt->cr0 = read_cr0(); 131 ctxt->cr2 = read_cr2(); |
| 132 ctxt->cr3 = read_cr3(); | 132 ctxt->cr3 = __read_cr3(); |
| 133 ctxt->cr4 = __read_cr4(); 134#ifdef CONFIG_X86_64 135 ctxt->cr8 = read_cr8(); 136#endif 137 ctxt->misc_enable_saved = !rdmsrl_safe(MSR_IA32_MISC_ENABLE, 138 &ctxt->misc_enable); 139 msr_save_context(ctxt); 140} --- 308 unchanged lines hidden --- | 133 ctxt->cr4 = __read_cr4(); 134#ifdef CONFIG_X86_64 135 ctxt->cr8 = read_cr8(); 136#endif 137 ctxt->misc_enable_saved = !rdmsrl_safe(MSR_IA32_MISC_ENABLE, 138 &ctxt->misc_enable); 139 msr_save_context(ctxt); 140} --- 308 unchanged lines hidden --- |