x86.c (ff5c2c0316ff0e3e2dba3ca14167d994453df093) x86.c (f5132b01386b5a67f1ff673bb2b96a507a3f7e41)
1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * derived from drivers/kvm/kvm_main.c
5 *
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008

--- 1588 unchanged lines hidden (view full) ---

1597
1598 /* Performance counters are not protected by a CPUID bit,
1599 * so we should check all of them in the generic path for the sake of
1600 * cross vendor migration.
1601 * Writing a zero into the event select MSRs disables them,
1602 * which we perfectly emulate ;-). Any other value should be at least
1603 * reported, some guests depend on them.
1604 */
1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * derived from drivers/kvm/kvm_main.c
5 *
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008

--- 1588 unchanged lines hidden (view full) ---

1597
1598 /* Performance counters are not protected by a CPUID bit,
1599 * so we should check all of them in the generic path for the sake of
1600 * cross vendor migration.
1601 * Writing a zero into the event select MSRs disables them,
1602 * which we perfectly emulate ;-). Any other value should be at least
1603 * reported, some guests depend on them.
1604 */
1605 case MSR_P6_EVNTSEL0:
1606 case MSR_P6_EVNTSEL1:
1607 case MSR_K7_EVNTSEL0:
1608 case MSR_K7_EVNTSEL1:
1609 case MSR_K7_EVNTSEL2:
1610 case MSR_K7_EVNTSEL3:
1611 if (data != 0)
1612 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1613 "0x%x data 0x%llx\n", msr, data);
1614 break;
1615 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1616 * so we ignore writes to make it happy.
1617 */
1605 case MSR_K7_EVNTSEL0:
1606 case MSR_K7_EVNTSEL1:
1607 case MSR_K7_EVNTSEL2:
1608 case MSR_K7_EVNTSEL3:
1609 if (data != 0)
1610 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1611 "0x%x data 0x%llx\n", msr, data);
1612 break;
1613 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1614 * so we ignore writes to make it happy.
1615 */
1618 case MSR_P6_PERFCTR0:
1619 case MSR_P6_PERFCTR1:
1620 case MSR_K7_PERFCTR0:
1621 case MSR_K7_PERFCTR1:
1622 case MSR_K7_PERFCTR2:
1623 case MSR_K7_PERFCTR3:
1624 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1625 "0x%x data 0x%llx\n", msr, data);
1626 break;
1627 case MSR_K7_CLK_CTL:

--- 20 unchanged lines hidden (view full) ---

1648 /* Drop writes to this legacy MSR -- see rdmsr
1649 * counterpart for further detail.
1650 */
1651 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1652 break;
1653 default:
1654 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1655 return xen_hvm_config(vcpu, data);
1616 case MSR_K7_PERFCTR0:
1617 case MSR_K7_PERFCTR1:
1618 case MSR_K7_PERFCTR2:
1619 case MSR_K7_PERFCTR3:
1620 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1621 "0x%x data 0x%llx\n", msr, data);
1622 break;
1623 case MSR_K7_CLK_CTL:

--- 20 unchanged lines hidden (view full) ---

1644 /* Drop writes to this legacy MSR -- see rdmsr
1645 * counterpart for further detail.
1646 */
1647 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1648 break;
1649 default:
1650 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1651 return xen_hvm_config(vcpu, data);
1652 if (kvm_pmu_msr(vcpu, msr))
1653 return kvm_pmu_set_msr(vcpu, msr, data);
1656 if (!ignore_msrs) {
1657 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1658 msr, data);
1659 return 1;
1660 } else {
1661 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1662 msr, data);
1663 break;

--- 146 unchanged lines hidden (view full) ---

1810 case MSR_IA32_DEBUGCTLMSR:
1811 case MSR_IA32_LASTBRANCHFROMIP:
1812 case MSR_IA32_LASTBRANCHTOIP:
1813 case MSR_IA32_LASTINTFROMIP:
1814 case MSR_IA32_LASTINTTOIP:
1815 case MSR_K8_SYSCFG:
1816 case MSR_K7_HWCR:
1817 case MSR_VM_HSAVE_PA:
1654 if (!ignore_msrs) {
1655 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1656 msr, data);
1657 return 1;
1658 } else {
1659 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1660 msr, data);
1661 break;

--- 146 unchanged lines hidden (view full) ---

1808 case MSR_IA32_DEBUGCTLMSR:
1809 case MSR_IA32_LASTBRANCHFROMIP:
1810 case MSR_IA32_LASTBRANCHTOIP:
1811 case MSR_IA32_LASTINTFROMIP:
1812 case MSR_IA32_LASTINTTOIP:
1813 case MSR_K8_SYSCFG:
1814 case MSR_K7_HWCR:
1815 case MSR_VM_HSAVE_PA:
1818 case MSR_P6_PERFCTR0:
1819 case MSR_P6_PERFCTR1:
1820 case MSR_P6_EVNTSEL0:
1821 case MSR_P6_EVNTSEL1:
1822 case MSR_K7_EVNTSEL0:
1823 case MSR_K7_PERFCTR0:
1824 case MSR_K8_INT_PENDING_MSG:
1825 case MSR_AMD64_NB_CFG:
1826 case MSR_FAM10H_MMIO_CONF_BASE:
1827 data = 0;
1828 break;
1829 case MSR_IA32_UCODE_REV:

--- 94 unchanged lines hidden (view full) ---

1924 * interpreted by the guest:
1925 *
1926 * L2 cache control register 3: 64GB range, 256KB size,
1927 * enabled, latency 0x1, configured
1928 */
1929 data = 0xbe702111;
1930 break;
1931 default:
1816 case MSR_K7_EVNTSEL0:
1817 case MSR_K7_PERFCTR0:
1818 case MSR_K8_INT_PENDING_MSG:
1819 case MSR_AMD64_NB_CFG:
1820 case MSR_FAM10H_MMIO_CONF_BASE:
1821 data = 0;
1822 break;
1823 case MSR_IA32_UCODE_REV:

--- 94 unchanged lines hidden (view full) ---

1918 * interpreted by the guest:
1919 *
1920 * L2 cache control register 3: 64GB range, 256KB size,
1921 * enabled, latency 0x1, configured
1922 */
1923 data = 0xbe702111;
1924 break;
1925 default:
1926 if (kvm_pmu_msr(vcpu, msr))
1927 return kvm_pmu_get_msr(vcpu, msr, pdata);
1932 if (!ignore_msrs) {
1933 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1934 return 1;
1935 } else {
1936 pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1937 data = 0;
1938 }
1939 break;

--- 2705 unchanged lines hidden (view full) ---

4645 }
4646 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
4647 for_each_online_cpu(cpu)
4648 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4649}
4650
4651static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4652
1928 if (!ignore_msrs) {
1929 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1930 return 1;
1931 } else {
1932 pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1933 data = 0;
1934 }
1935 break;

--- 2705 unchanged lines hidden (view full) ---

4641 }
4642 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
4643 for_each_online_cpu(cpu)
4644 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4645}
4646
4647static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4648
4653static int kvm_is_in_guest(void)
4649int kvm_is_in_guest(void)
4654{
4655 return __this_cpu_read(current_vcpu) != NULL;
4656}
4657
4658static int kvm_is_user_mode(void)
4659{
4660 int user_mode = 3;
4661

--- 447 unchanged lines hidden (view full) ---

5109 goto out;
5110 }
5111 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5112 record_steal_time(vcpu);
5113 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5114 process_nmi(vcpu);
5115 req_immediate_exit =
5116 kvm_check_request(KVM_REQ_IMMEDIATE_EXIT, vcpu);
4650{
4651 return __this_cpu_read(current_vcpu) != NULL;
4652}
4653
4654static int kvm_is_user_mode(void)
4655{
4656 int user_mode = 3;
4657

--- 447 unchanged lines hidden (view full) ---

5105 goto out;
5106 }
5107 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5108 record_steal_time(vcpu);
5109 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5110 process_nmi(vcpu);
5111 req_immediate_exit =
5112 kvm_check_request(KVM_REQ_IMMEDIATE_EXIT, vcpu);
5113 if (kvm_check_request(KVM_REQ_PMU, vcpu))
5114 kvm_handle_pmu_event(vcpu);
5115 if (kvm_check_request(KVM_REQ_PMI, vcpu))
5116 kvm_deliver_pmi(vcpu);
5117 }
5118
5119 r = kvm_mmu_reload(vcpu);
5120 if (unlikely(r))
5121 goto out;
5122
5123 if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5124 inject_pending_event(vcpu);

--- 720 unchanged lines hidden (view full) ---

5845 vcpu->arch.st.msr_val = 0;
5846
5847 kvmclock_reset(vcpu);
5848
5849 kvm_clear_async_pf_completion_queue(vcpu);
5850 kvm_async_pf_hash_reset(vcpu);
5851 vcpu->arch.apf.halted = false;
5852
5117 }
5118
5119 r = kvm_mmu_reload(vcpu);
5120 if (unlikely(r))
5121 goto out;
5122
5123 if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5124 inject_pending_event(vcpu);

--- 720 unchanged lines hidden (view full) ---

5845 vcpu->arch.st.msr_val = 0;
5846
5847 kvmclock_reset(vcpu);
5848
5849 kvm_clear_async_pf_completion_queue(vcpu);
5850 kvm_async_pf_hash_reset(vcpu);
5851 vcpu->arch.apf.halted = false;
5852
5853 kvm_pmu_reset(vcpu);
5854
5853 return kvm_x86_ops->vcpu_reset(vcpu);
5854}
5855
5856int kvm_arch_hardware_enable(void *garbage)
5857{
5858 struct kvm *kvm;
5859 struct kvm_vcpu *vcpu;
5860 int i;

--- 68 unchanged lines hidden (view full) ---

5929 goto fail_free_lapic;
5930 }
5931 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5932
5933 if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
5934 goto fail_free_mce_banks;
5935
5936 kvm_async_pf_hash_reset(vcpu);
5855 return kvm_x86_ops->vcpu_reset(vcpu);
5856}
5857
5858int kvm_arch_hardware_enable(void *garbage)
5859{
5860 struct kvm *kvm;
5861 struct kvm_vcpu *vcpu;
5862 int i;

--- 68 unchanged lines hidden (view full) ---

5931 goto fail_free_lapic;
5932 }
5933 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5934
5935 if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
5936 goto fail_free_mce_banks;
5937
5938 kvm_async_pf_hash_reset(vcpu);
5939 kvm_pmu_init(vcpu);
5937
5938 return 0;
5939fail_free_mce_banks:
5940 kfree(vcpu->arch.mce_banks);
5941fail_free_lapic:
5942 kvm_free_lapic(vcpu);
5943fail_mmu_destroy:
5944 kvm_mmu_destroy(vcpu);
5945fail_free_pio_data:
5946 free_page((unsigned long)vcpu->arch.pio_data);
5947fail:
5948 return r;
5949}
5950
5951void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5952{
5953 int idx;
5954
5940
5941 return 0;
5942fail_free_mce_banks:
5943 kfree(vcpu->arch.mce_banks);
5944fail_free_lapic:
5945 kvm_free_lapic(vcpu);
5946fail_mmu_destroy:
5947 kvm_mmu_destroy(vcpu);
5948fail_free_pio_data:
5949 free_page((unsigned long)vcpu->arch.pio_data);
5950fail:
5951 return r;
5952}
5953
5954void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5955{
5956 int idx;
5957
5958 kvm_pmu_destroy(vcpu);
5955 kfree(vcpu->arch.mce_banks);
5956 kvm_free_lapic(vcpu);
5957 idx = srcu_read_lock(&vcpu->kvm->srcu);
5958 kvm_mmu_destroy(vcpu);
5959 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5960 free_page((unsigned long)vcpu->arch.pio_data);
5961}
5962

--- 353 unchanged lines hidden --- 		5959 kfree(vcpu->arch.mce_banks);
5960 kvm_free_lapic(vcpu);
5961 idx = srcu_read_lock(&vcpu->kvm->srcu);
5962 kvm_mmu_destroy(vcpu);
5963 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5964 free_page((unsigned long)vcpu->arch.pio_data);
5965}
5966

--- 353 unchanged lines hidden ---