| tlbflush.h (3d28ebceaffab40f30afa87e33331560148d7b8b) | tlbflush.h (6c690ee1039b251e583fc65b28da30e97d6a7385) |
|---|---|
| 1#ifndef _ASM_X86_TLBFLUSH_H 2#define _ASM_X86_TLBFLUSH_H 3 4#include <linux/mm.h> 5#include <linux/sched.h> 6 7#include <asm/processor.h> 8#include <asm/cpufeature.h> --- 142 unchanged lines hidden (view full) --- 151static inline void __native_flush_tlb(void) 152{ 153 /* 154 * If current->mm == NULL then we borrow a mm which may change during a 155 * task switch and therefore we must not be preempted while we write CR3 156 * back: 157 */ 158 preempt_disable(); | 1#ifndef _ASM_X86_TLBFLUSH_H 2#define _ASM_X86_TLBFLUSH_H 3 4#include <linux/mm.h> 5#include <linux/sched.h> 6 7#include <asm/processor.h> 8#include <asm/cpufeature.h> --- 142 unchanged lines hidden (view full) --- 151static inline void __native_flush_tlb(void) 152{ 153 /* 154 * If current->mm == NULL then we borrow a mm which may change during a 155 * task switch and therefore we must not be preempted while we write CR3 156 * back: 157 */ 158 preempt_disable(); |
| 159 native_write_cr3(native_read_cr3()); | 159 native_write_cr3(__native_read_cr3()); |
| 160 preempt_enable(); 161} 162 163static inline void __native_flush_tlb_global_irq_disabled(void) 164{ 165 unsigned long cr4; 166 167 cr4 = this_cpu_read(cpu_tlbstate.cr4); --- 91 unchanged lines hidden (view full) --- 259#define TLBSTATE_OK 1 260#define TLBSTATE_LAZY 2 261 262static inline void reset_lazy_tlbstate(void) 263{ 264 this_cpu_write(cpu_tlbstate.state, 0); 265 this_cpu_write(cpu_tlbstate.loaded_mm, &init_mm); 266 | 160 preempt_enable(); 161} 162 163static inline void __native_flush_tlb_global_irq_disabled(void) 164{ 165 unsigned long cr4; 166 167 cr4 = this_cpu_read(cpu_tlbstate.cr4); --- 91 unchanged lines hidden (view full) --- 259#define TLBSTATE_OK 1 260#define TLBSTATE_LAZY 2 261 262static inline void reset_lazy_tlbstate(void) 263{ 264 this_cpu_write(cpu_tlbstate.state, 0); 265 this_cpu_write(cpu_tlbstate.loaded_mm, &init_mm); 266 |
| 267 WARN_ON(read_cr3() != __pa_symbol(swapper_pg_dir)); | 267 WARN_ON(read_cr3_pa() != __pa_symbol(swapper_pg_dir)); |
| 268} 269 270static inline void arch_tlbbatch_add_mm(struct arch_tlbflush_unmap_batch *batch, 271 struct mm_struct *mm) 272{ 273 cpumask_or(&batch->cpumask, &batch->cpumask, mm_cpumask(mm)); 274} 275 276extern void arch_tlbbatch_flush(struct arch_tlbflush_unmap_batch *batch); 277 278#ifndef CONFIG_PARAVIRT 279#define flush_tlb_others(mask, info) \ 280 native_flush_tlb_others(mask, info) 281#endif 282 283#endif /* _ASM_X86_TLBFLUSH_H */ | 268} 269 270static inline void arch_tlbbatch_add_mm(struct arch_tlbflush_unmap_batch *batch, 271 struct mm_struct *mm) 272{ 273 cpumask_or(&batch->cpumask, &batch->cpumask, mm_cpumask(mm)); 274} 275 276extern void arch_tlbbatch_flush(struct arch_tlbflush_unmap_batch *batch); 277 278#ifndef CONFIG_PARAVIRT 279#define flush_tlb_others(mask, info) \ 280 native_flush_tlb_others(mask, info) 281#endif 282 283#endif /* _ASM_X86_TLBFLUSH_H */ |