i8259.h (3eb66e91a25497065c5322b1268cbc3953642227) i8259.h (d25316616842b593de6f89ce2101f1af62f4d559)
1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _ASM_X86_I8259_H
3#define _ASM_X86_I8259_H
4
5#include <linux/delay.h>
6#include <asm/io.h>
7
8extern unsigned int cached_irq_mask;

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14/* i8259A PIC registers */
15#define PIC_MASTER_CMD 0x20
16#define PIC_MASTER_IMR 0x21
17#define PIC_MASTER_ISR PIC_MASTER_CMD
18#define PIC_MASTER_POLL PIC_MASTER_ISR
19#define PIC_MASTER_OCW3 PIC_MASTER_ISR
20#define PIC_SLAVE_CMD 0xa0
21#define PIC_SLAVE_IMR 0xa1
1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _ASM_X86_I8259_H
3#define _ASM_X86_I8259_H
4
5#include <linux/delay.h>
6#include <asm/io.h>
7
8extern unsigned int cached_irq_mask;

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14/* i8259A PIC registers */
15#define PIC_MASTER_CMD 0x20
16#define PIC_MASTER_IMR 0x21
17#define PIC_MASTER_ISR PIC_MASTER_CMD
18#define PIC_MASTER_POLL PIC_MASTER_ISR
19#define PIC_MASTER_OCW3 PIC_MASTER_ISR
20#define PIC_SLAVE_CMD 0xa0
21#define PIC_SLAVE_IMR 0xa1
22#define PIC_ELCR1 0x4d0
23#define PIC_ELCR2 0x4d1
22
23/* i8259A PIC related value */
24#define PIC_CASCADE_IR 2
25#define MASTER_ICW4_DEFAULT 0x01
26#define SLAVE_ICW4_DEFAULT 0x01
27#define PIC_ICW4_AEOI 2
28
29extern raw_spinlock_t i8259A_lock;

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25/* i8259A PIC related value */
26#define PIC_CASCADE_IR 2
27#define MASTER_ICW4_DEFAULT 0x01
28#define SLAVE_ICW4_DEFAULT 0x01
29#define PIC_ICW4_AEOI 2
30
31extern raw_spinlock_t i8259A_lock;

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