| calling.h (2ef6765ccaab2c69470d7049d9a9bf6456a6e666) | calling.h (8a09317b895f073977346779df52f67c1056d81d) |
|---|---|
| 1/* SPDX-License-Identifier: GPL-2.0 */ 2#include <linux/jump_label.h> 3#include <asm/unwind_hints.h> | 1/* SPDX-License-Identifier: GPL-2.0 */ 2#include <linux/jump_label.h> 3#include <asm/unwind_hints.h> |
| 4#include <asm/cpufeatures.h> 5#include <asm/page_types.h> |
|
| 4 5/* 6 7 x86 function call convention, 64-bit: 8 ------------------------------------- 9 arguments | callee-saved | extra caller-saved | return 10 [callee-clobbered] | | [callee-clobbered] | 11 --------------------------------------------------------------------------- --- 170 unchanged lines hidden (view full) --- 182 leaq \ptregs_offset(%rsp), %rbp 183 .else 184 mov %rsp, %rbp 185 .endif 186 orq $0x1, %rbp 187#endif 188.endm 189 | 6 7/* 8 9 x86 function call convention, 64-bit: 10 ------------------------------------- 11 arguments | callee-saved | extra caller-saved | return 12 [callee-clobbered] | | [callee-clobbered] | 13 --------------------------------------------------------------------------- --- 170 unchanged lines hidden (view full) --- 184 leaq \ptregs_offset(%rsp), %rbp 185 .else 186 mov %rsp, %rbp 187 .endif 188 orq $0x1, %rbp 189#endif 190.endm 191 |
| 192#ifdef CONFIG_PAGE_TABLE_ISOLATION 193 194/* PAGE_TABLE_ISOLATION PGDs are 8k. Flip bit 12 to switch between the two halves: */ 195#define PTI_SWITCH_MASK (1<<PAGE_SHIFT) 196 197.macro ADJUST_KERNEL_CR3 reg:req 198 /* Clear "PAGE_TABLE_ISOLATION bit", point CR3 at kernel pagetables: */ 199 andq $(~PTI_SWITCH_MASK), \reg 200.endm 201 202.macro ADJUST_USER_CR3 reg:req 203 /* Move CR3 up a page to the user page tables: */ 204 orq $(PTI_SWITCH_MASK), \reg 205.endm 206 207.macro SWITCH_TO_KERNEL_CR3 scratch_reg:req 208 mov %cr3, \scratch_reg 209 ADJUST_KERNEL_CR3 \scratch_reg 210 mov \scratch_reg, %cr3 211.endm 212 213.macro SWITCH_TO_USER_CR3 scratch_reg:req 214 mov %cr3, \scratch_reg 215 ADJUST_USER_CR3 \scratch_reg 216 mov \scratch_reg, %cr3 217.endm 218 219.macro SAVE_AND_SWITCH_TO_KERNEL_CR3 scratch_reg:req save_reg:req 220 movq %cr3, \scratch_reg 221 movq \scratch_reg, \save_reg 222 /* 223 * Is the switch bit zero? This means the address is 224 * up in real PAGE_TABLE_ISOLATION patches in a moment. 225 */ 226 testq $(PTI_SWITCH_MASK), \scratch_reg 227 jz .Ldone_\@ 228 229 ADJUST_KERNEL_CR3 \scratch_reg 230 movq \scratch_reg, %cr3 231 232.Ldone_\@: 233.endm 234 235.macro RESTORE_CR3 save_reg:req 236 /* 237 * The CR3 write could be avoided when not changing its value, 238 * but would require a CR3 read *and* a scratch register. 239 */ 240 movq \save_reg, %cr3 241.endm 242 243#else /* CONFIG_PAGE_TABLE_ISOLATION=n: */ 244 245.macro SWITCH_TO_KERNEL_CR3 scratch_reg:req 246.endm 247.macro SWITCH_TO_USER_CR3 scratch_reg:req 248.endm 249.macro SAVE_AND_SWITCH_TO_KERNEL_CR3 scratch_reg:req save_reg:req 250.endm 251.macro RESTORE_CR3 save_reg:req 252.endm 253 254#endif 255 |
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| 190#endif /* CONFIG_X86_64 */ 191 192/* 193 * This does 'call enter_from_user_mode' unless we can avoid it based on 194 * kernel config or using the static jump infrastructure. 195 */ 196.macro CALL_enter_from_user_mode 197#ifdef CONFIG_CONTEXT_TRACKING 198#ifdef HAVE_JUMP_LABEL 199 STATIC_JUMP_IF_FALSE .Lafter_call_\@, context_tracking_enabled, def=0 200#endif 201 call enter_from_user_mode 202.Lafter_call_\@: 203#endif 204.endm | 256#endif /* CONFIG_X86_64 */ 257 258/* 259 * This does 'call enter_from_user_mode' unless we can avoid it based on 260 * kernel config or using the static jump infrastructure. 261 */ 262.macro CALL_enter_from_user_mode 263#ifdef CONFIG_CONTEXT_TRACKING 264#ifdef HAVE_JUMP_LABEL 265 STATIC_JUMP_IF_FALSE .Lafter_call_\@, context_tracking_enabled, def=0 266#endif 267 call enter_from_user_mode 268.Lafter_call_\@: 269#endif 270.endm |