cpucheck.c (75bf465f0bc33e9b776a46d6a1b9b990f5fb7c37) cpucheck.c (950d00558a920227b5703d1fcc4751cfe03853cd)
1// SPDX-License-Identifier: GPL-2.0-only
2/* -*- linux-c -*- ------------------------------------------------------- *
3 *
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 * Copyright 2007 rPath, Inc. - All Rights Reserved
6 *
7 * ----------------------------------------------------------------------- */
8

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22# include "boot.h"
23#endif
24#include <linux/types.h>
25#include <asm/intel-family.h>
26#include <asm/processor-flags.h>
27#include <asm/required-features.h>
28#include <asm/msr-index.h>
29#include "string.h"
1// SPDX-License-Identifier: GPL-2.0-only
2/* -*- linux-c -*- ------------------------------------------------------- *
3 *
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 * Copyright 2007 rPath, Inc. - All Rights Reserved
6 *
7 * ----------------------------------------------------------------------- */
8

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22# include "boot.h"
23#endif
24#include <linux/types.h>
25#include <asm/intel-family.h>
26#include <asm/processor-flags.h>
27#include <asm/required-features.h>
28#include <asm/msr-index.h>
29#include "string.h"
30#include "msr.h"
30
31static u32 err_flags[NCAPINTS];
32
33static const int req_level = CONFIG_X86_MINIMUM_CPU_FAMILY;
34
35static const u32 req_flags[NCAPINTS] =
36{
37 REQUIRED_MASK0,

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125
126 if (err == 0x01 &&
127 !(err_flags[0] &
128 ~((1 << X86_FEATURE_XMM)|(1 << X86_FEATURE_XMM2))) &&
129 is_amd()) {
130 /* If this is an AMD and we're only missing SSE+SSE2, try to
131 turn them on */
132
31
32static u32 err_flags[NCAPINTS];
33
34static const int req_level = CONFIG_X86_MINIMUM_CPU_FAMILY;
35
36static const u32 req_flags[NCAPINTS] =
37{
38 REQUIRED_MASK0,

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126
127 if (err == 0x01 &&
128 !(err_flags[0] &
129 ~((1 << X86_FEATURE_XMM)|(1 << X86_FEATURE_XMM2))) &&
130 is_amd()) {
131 /* If this is an AMD and we're only missing SSE+SSE2, try to
132 turn them on */
133
133 u32 ecx = MSR_K7_HWCR;
134 u32 eax, edx;
134 struct msr m;
135
135
136 asm("rdmsr" : "=a" (eax), "=d" (edx) : "c" (ecx));
137 eax &= ~(1 << 15);
138 asm("wrmsr" : : "a" (eax), "d" (edx), "c" (ecx));
136 boot_rdmsr(MSR_K7_HWCR, &m);
137 m.l &= ~(1 << 15);
138 boot_wrmsr(MSR_K7_HWCR, &m);
139
140 get_cpuflags(); /* Make sure it really did something */
141 err = check_cpuflags();
142 } else if (err == 0x01 &&
143 !(err_flags[0] & ~(1 << X86_FEATURE_CX8)) &&
144 is_centaur() && cpu.model >= 6) {
145 /* If this is a VIA C3, we might have to enable CX8
146 explicitly */
147
139
140 get_cpuflags(); /* Make sure it really did something */
141 err = check_cpuflags();
142 } else if (err == 0x01 &&
143 !(err_flags[0] & ~(1 << X86_FEATURE_CX8)) &&
144 is_centaur() && cpu.model >= 6) {
145 /* If this is a VIA C3, we might have to enable CX8
146 explicitly */
147
148 u32 ecx = MSR_VIA_FCR;
149 u32 eax, edx;
148 struct msr m;
150
149
151 asm("rdmsr" : "=a" (eax), "=d" (edx) : "c" (ecx));
152 eax |= (1<<1)|(1<<7);
153 asm("wrmsr" : : "a" (eax), "d" (edx), "c" (ecx));
150 boot_rdmsr(MSR_VIA_FCR, &m);
151 m.l |= (1 << 1) | (1 << 7);
152 boot_wrmsr(MSR_VIA_FCR, &m);
154
155 set_bit(X86_FEATURE_CX8, cpu.flags);
156 err = check_cpuflags();
157 } else if (err == 0x01 && is_transmeta()) {
158 /* Transmeta might have masked feature bits in word 0 */
159
153
154 set_bit(X86_FEATURE_CX8, cpu.flags);
155 err = check_cpuflags();
156 } else if (err == 0x01 && is_transmeta()) {
157 /* Transmeta might have masked feature bits in word 0 */
158
160 u32 ecx = 0x80860004;
161 u32 eax, edx;
159 struct msr m, m_tmp;
162 u32 level = 1;
163
160 u32 level = 1;
161
164 asm("rdmsr" : "=a" (eax), "=d" (edx) : "c" (ecx));
165 asm("wrmsr" : : "a" (~0), "d" (edx), "c" (ecx));
162 boot_rdmsr(0x80860004, &m);
163 m_tmp = m;
164 m_tmp.l = ~0;
165 boot_wrmsr(0x80860004, &m_tmp);
166 asm("cpuid"
167 : "+a" (level), "=d" (cpu.flags[0])
168 : : "ecx", "ebx");
166 asm("cpuid"
167 : "+a" (level), "=d" (cpu.flags[0])
168 : : "ecx", "ebx");
169 asm("wrmsr" : : "a" (eax), "d" (edx), "c" (ecx));
169 boot_wrmsr(0x80860004, &m);
170
171 err = check_cpuflags();
172 } else if (err == 0x01 &&
173 !(err_flags[0] & ~(1 << X86_FEATURE_PAE)) &&
174 is_intel() && cpu.level == 6 &&
175 (cpu.model == 9 || cpu.model == 13)) {
176 /* PAE is disabled on this Pentium M but can be forced */
177 if (cmdline_find_option_bool("forcepae")) {

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171 err = check_cpuflags();
172 } else if (err == 0x01 &&
173 !(err_flags[0] & ~(1 << X86_FEATURE_PAE)) &&
174 is_intel() && cpu.level == 6 &&
175 (cpu.model == 9 || cpu.model == 13)) {
176 /* PAE is disabled on this Pentium M but can be forced */
177 if (cmdline_find_option_bool("forcepae")) {

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