| tsb.c (2e483528cebad089d0bb3f9aebb0ada22d968ffa) | tsb.c (6cb79b3f3ba2b14590cac02ee13ab7410b6225ed) |
|---|---|
| 1/* arch/sparc64/mm/tsb.c 2 * 3 * Copyright (C) 2006, 2008 David S. Miller <davem@davemloft.net> 4 */ 5 6#include <linux/kernel.h> 7#include <linux/preempt.h> 8#include <linux/slab.h> --- 166 unchanged lines hidden (view full) --- 175 tsb_reg = 0x7UL; 176 page_sz = 4 * 1024 * 1024; 177 break; 178 179 default: 180 printk(KERN_ERR "TSB[%s:%d]: Impossible TSB size %lu, killing process.\n", 181 current->comm, current->pid, tsb_bytes); 182 do_exit(SIGSEGV); | 1/* arch/sparc64/mm/tsb.c 2 * 3 * Copyright (C) 2006, 2008 David S. Miller <davem@davemloft.net> 4 */ 5 6#include <linux/kernel.h> 7#include <linux/preempt.h> 8#include <linux/slab.h> --- 166 unchanged lines hidden (view full) --- 175 tsb_reg = 0x7UL; 176 page_sz = 4 * 1024 * 1024; 177 break; 178 179 default: 180 printk(KERN_ERR "TSB[%s:%d]: Impossible TSB size %lu, killing process.\n", 181 current->comm, current->pid, tsb_bytes); 182 do_exit(SIGSEGV); |
| 183 }; | 183 } |
| 184 tte |= pte_sz_bits(page_sz); 185 186 if (tlb_type == cheetah_plus || tlb_type == hypervisor) { 187 /* Physical mapping, no locked TLB entry for TSB. */ 188 tsb_reg |= tsb_paddr; 189 190 mm->context.tsb_block[tsb_idx].tsb_reg_val = tsb_reg; 191 mm->context.tsb_block[tsb_idx].tsb_map_vaddr = 0; --- 18 unchanged lines hidden (view full) --- 210 break; 211#ifdef CONFIG_HUGETLB_PAGE 212 case MM_TSB_HUGE: 213 hp->pgsz_idx = HV_PGSZ_IDX_HUGE; 214 break; 215#endif 216 default: 217 BUG(); | 184 tte |= pte_sz_bits(page_sz); 185 186 if (tlb_type == cheetah_plus || tlb_type == hypervisor) { 187 /* Physical mapping, no locked TLB entry for TSB. */ 188 tsb_reg |= tsb_paddr; 189 190 mm->context.tsb_block[tsb_idx].tsb_reg_val = tsb_reg; 191 mm->context.tsb_block[tsb_idx].tsb_map_vaddr = 0; --- 18 unchanged lines hidden (view full) --- 210 break; 211#ifdef CONFIG_HUGETLB_PAGE 212 case MM_TSB_HUGE: 213 hp->pgsz_idx = HV_PGSZ_IDX_HUGE; 214 break; 215#endif 216 default: 217 BUG(); |
| 218 }; | 218 } |
| 219 hp->assoc = 1; 220 hp->num_ttes = tsb_bytes / 16; 221 hp->ctx_idx = 0; 222 switch (tsb_idx) { 223 case MM_TSB_BASE: 224 hp->pgsz_mask = HV_PGSZ_MASK_BASE; 225 break; 226#ifdef CONFIG_HUGETLB_PAGE 227 case MM_TSB_HUGE: 228 hp->pgsz_mask = HV_PGSZ_MASK_HUGE; 229 break; 230#endif 231 default: 232 BUG(); | 219 hp->assoc = 1; 220 hp->num_ttes = tsb_bytes / 16; 221 hp->ctx_idx = 0; 222 switch (tsb_idx) { 223 case MM_TSB_BASE: 224 hp->pgsz_mask = HV_PGSZ_MASK_BASE; 225 break; 226#ifdef CONFIG_HUGETLB_PAGE 227 case MM_TSB_HUGE: 228 hp->pgsz_mask = HV_PGSZ_MASK_HUGE; 229 break; 230#endif 231 default: 232 BUG(); |
| 233 }; | 233 } |
| 234 hp->tsb_base = tsb_paddr; 235 hp->resv = 0; 236 } 237} 238 239static struct kmem_cache *tsb_caches[8] __read_mostly; 240 241static const char *tsb_cache_names[8] = { --- 264 unchanged lines hidden --- | 234 hp->tsb_base = tsb_paddr; 235 hp->resv = 0; 236 } 237} 238 239static struct kmem_cache *tsb_caches[8] __read_mostly; 240 241static const char *tsb_cache_names[8] = { --- 264 unchanged lines hidden --- |