| ex.S (a80b824f0b63fa3a8c269903828beb0837d738e7) | ex.S (74d99a5e262229ee865f6f68528d10b82471ead6) |
|---|---|
| 1/* 2 * arch/sh/kernel/cpu/sh3/ex.S 3 * 4 * The SH-3 and SH-4 exception vector table. 5 6 * Copyright (C) 1999, 2000, 2002 Niibe Yutaka 7 * Copyright (C) 2003 - 2006 Paul Mundt 8 * --- 22 unchanged lines hidden (view full) --- 31 .long exception_error ! tlb miss store 32 .long exception_error ! initial page write 33 .long exception_error ! tlb prot violation load 34 .long exception_error ! tlb prot violation store 35 .long exception_error ! address error load 36 .long exception_error ! address error store /* 100 */ 37#endif 38#if defined(CONFIG_SH_FPU) | 1/* 2 * arch/sh/kernel/cpu/sh3/ex.S 3 * 4 * The SH-3 and SH-4 exception vector table. 5 6 * Copyright (C) 1999, 2000, 2002 Niibe Yutaka 7 * Copyright (C) 2003 - 2006 Paul Mundt 8 * --- 22 unchanged lines hidden (view full) --- 31 .long exception_error ! tlb miss store 32 .long exception_error ! initial page write 33 .long exception_error ! tlb prot violation load 34 .long exception_error ! tlb prot violation store 35 .long exception_error ! address error load 36 .long exception_error ! address error store /* 100 */ 37#endif 38#if defined(CONFIG_SH_FPU) |
| 39 .long do_fpu_error /* 120 */ | 39 .long fpu_error_trap_handler /* 120 */ |
| 40#else 41 .long exception_error /* 120 */ 42#endif 43 .long exception_error /* 140 */ 44 .long system_call ! Unconditional Trap /* 160 */ 45 .long exception_error ! reserved_instruction (filled by trap_init) /* 180 */ 46 .long exception_error ! illegal_slot_instruction (filled by trap_init) /*1A0*/ 47ENTRY(nmi_slot) --- 14 unchanged lines hidden --- | 40#else 41 .long exception_error /* 120 */ 42#endif 43 .long exception_error /* 140 */ 44 .long system_call ! Unconditional Trap /* 160 */ 45 .long exception_error ! reserved_instruction (filled by trap_init) /* 180 */ 46 .long exception_error ! illegal_slot_instruction (filled by trap_init) /*1A0*/ 47ENTRY(nmi_slot) --- 14 unchanged lines hidden --- |