imask.c (026477c1141b67e98e3bd8bdedb7d4b88a3ecd09) imask.c (9d4436a6fbc8c5eccdfcb8f5884e0a7b4a57f6d2)
1/*
2 * arch/sh/kernel/cpu/irq/imask.c
3 *
4 * Copyright (C) 1999, 2000 Niibe Yutaka
5 *
6 * Simple interrupt handling using IMASK of SR register.
7 *
8 */

--- 39 unchanged lines hidden (view full) ---

48 .ack = mask_and_ack_imask,
49 .end = end_imask_irq
50};
51
52void static inline set_interrupt_registers(int ip)
53{
54 unsigned long __dummy;
55
1/*
2 * arch/sh/kernel/cpu/irq/imask.c
3 *
4 * Copyright (C) 1999, 2000 Niibe Yutaka
5 *
6 * Simple interrupt handling using IMASK of SR register.
7 *
8 */

--- 39 unchanged lines hidden (view full) ---

48 .ack = mask_and_ack_imask,
49 .end = end_imask_irq
50};
51
52void static inline set_interrupt_registers(int ip)
53{
54 unsigned long __dummy;
55
56 asm volatile("ldc %2, r6_bank\n\t"
56 asm volatile(
57#ifdef CONFIG_CPU_HAS_SR_RB
58 "ldc %2, r6_bank\n\t"
59#endif
57 "stc sr, %0\n\t"
58 "and #0xf0, %0\n\t"
59 "shlr2 %0\n\t"
60 "cmp/eq #0x3c, %0\n\t"
61 "bt/s 1f ! CLI-ed\n\t"
62 " stc sr, %0\n\t"
63 "and %1, %0\n\t"
64 "or %2, %0\n\t"

--- 46 unchanged lines hidden --- 		60 "stc sr, %0\n\t"
61 "and #0xf0, %0\n\t"
62 "shlr2 %0\n\t"
63 "cmp/eq #0x3c, %0\n\t"
64 "bt/s 1f ! CLI-ed\n\t"
65 " stc sr, %0\n\t"
66 "and %1, %0\n\t"
67 "or %2, %0\n\t"

--- 46 unchanged lines hidden ---