head64.S (cebeb0f1885fa93c44be5d4e0b9b640210ff088c) head64.S (e22cf8ca6f75a6c4fccf2d6ee818bdb1205f32e6)
1/*
2 * Copyright IBM Corp. 1999, 2010
3 *
4 * Author(s): Hartmut Penner <hp@de.ibm.com>
5 * Martin Schwidefsky <schwidefsky@de.ibm.com>
6 * Rob van der Heij <rvdhei@iae.nl>
7 * Heiko Carstens <heiko.carstens@de.ibm.com>
8 *
9 */
10
11#include <linux/init.h>
12#include <linux/linkage.h>
13#include <asm/asm-offsets.h>
14#include <asm/thread_info.h>
15#include <asm/page.h>
16
17__HEAD
18ENTRY(startup_continue)
1/*
2 * Copyright IBM Corp. 1999, 2010
3 *
4 * Author(s): Hartmut Penner <hp@de.ibm.com>
5 * Martin Schwidefsky <schwidefsky@de.ibm.com>
6 * Rob van der Heij <rvdhei@iae.nl>
7 * Heiko Carstens <heiko.carstens@de.ibm.com>
8 *
9 */
10
11#include <linux/init.h>
12#include <linux/linkage.h>
13#include <asm/asm-offsets.h>
14#include <asm/thread_info.h>
15#include <asm/page.h>
16
17__HEAD
18ENTRY(startup_continue)
19 larl %r1,sched_clock_base_cc
19 tm __LC_STFL_FAC_LIST+6,0x80 # LPP available ?
20 jz 0f
21 xc __LC_LPP+1(7,0),__LC_LPP+1 # clear lpp and current_pid
22 mvi __LC_LPP,0x80 # and set LPP_MAGIC
23 .insn s,0xb2800000,__LC_LPP # load program parameter
240: larl %r1,sched_clock_base_cc
20 mvc 0(8,%r1),__LC_LAST_UPDATE_CLOCK
21 larl %r13,.LPG1 # get base
22 lctlg %c0,%c15,.Lctl-.LPG1(%r13) # load control registers
23 lg %r12,.Lparmaddr-.LPG1(%r13) # pointer to parameter area
24 # move IPL device to lowcore
25 lghi %r0,__LC_PASTE
26 stg %r0,__LC_VDSO_PER_CPU
27#

--- 78 unchanged lines hidden --- 		25 mvc 0(8,%r1),__LC_LAST_UPDATE_CLOCK
26 larl %r13,.LPG1 # get base
27 lctlg %c0,%c15,.Lctl-.LPG1(%r13) # load control registers
28 lg %r12,.Lparmaddr-.LPG1(%r13) # pointer to parameter area
29 # move IPL device to lowcore
30 lghi %r0,__LC_PASTE
31 stg %r0,__LC_VDSO_PER_CPU
32#

--- 78 unchanged lines hidden ---