cpufeature.c (ff689fd21cb13098305bae3f8d0c0065df2e2fc1) cpufeature.c (a35707c3d850dda0ceefb75b1b3bd191921d5765)
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copied from arch/arm64/kernel/cpufeature.c
4 *
5 * Copyright (C) 2015 ARM Ltd.
6 * Copyright (C) 2017 SiFive
7 */
8

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249struct cpufeature_info {
250 char name[ERRATA_STRING_LENGTH_MAX];
251 bool (*check_func)(unsigned int stage);
252};
253
254static bool __init_or_module cpufeature_svpbmt_check_func(unsigned int stage)
255{
256#ifdef CONFIG_RISCV_ISA_SVPBMT
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copied from arch/arm64/kernel/cpufeature.c
4 *
5 * Copyright (C) 2015 ARM Ltd.
6 * Copyright (C) 2017 SiFive
7 */
8

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249struct cpufeature_info {
250 char name[ERRATA_STRING_LENGTH_MAX];
251 bool (*check_func)(unsigned int stage);
252};
253
254static bool __init_or_module cpufeature_svpbmt_check_func(unsigned int stage)
255{
256#ifdef CONFIG_RISCV_ISA_SVPBMT
257 return riscv_isa_extension_available(NULL, SVPBMT);
257 switch (stage) {
258 case RISCV_ALTERNATIVES_EARLY_BOOT:
259 return false;
260 default:
261 return riscv_isa_extension_available(NULL, SVPBMT);
262 }
258#endif
259
260 return false;
261}
262
263static const struct cpufeature_info __initdata_or_module
264cpufeature_list[CPUFEATURE_NUMBER] = {
265 {

--- 47 unchanged lines hidden --- 		263#endif
264
265 return false;
266}
267
268static const struct cpufeature_info __initdata_or_module
269cpufeature_list[CPUFEATURE_NUMBER] = {
270 {

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