mpic.c (478c6a43fcbc6c11609f8cee7c7b57223907754f) mpic.c (d91e4ea7047d96733d763f1626f1f21ff4298cef)
1/*
2 * arch/powerpc/kernel/mpic.c
3 *
4 * Driver for interrupt controllers following the OpenPIC standard, the
5 * common implementation beeing IBM's MPIC. This driver also can deal
6 * with various broken implementations of this HW.
7 *
8 * Copyright (C) 2004 Benjamin Herrenschmidt, IBM Corp.

--- 1156 unchanged lines hidden (view full) ---

1165 mpic_write(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0),
1166 mpic_read(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0))
1167 | MPIC_GREG_GCONF_RESET);
1168 while( mpic_read(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0))
1169 & MPIC_GREG_GCONF_RESET)
1170 mb();
1171 }
1172
1/*
2 * arch/powerpc/kernel/mpic.c
3 *
4 * Driver for interrupt controllers following the OpenPIC standard, the
5 * common implementation beeing IBM's MPIC. This driver also can deal
6 * with various broken implementations of this HW.
7 *
8 * Copyright (C) 2004 Benjamin Herrenschmidt, IBM Corp.

--- 1156 unchanged lines hidden (view full) ---

1165 mpic_write(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0),
1166 mpic_read(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0))
1167 | MPIC_GREG_GCONF_RESET);
1168 while( mpic_read(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0))
1169 & MPIC_GREG_GCONF_RESET)
1170 mb();
1171 }
1172
1173 /* CoreInt */
1174 if (flags & MPIC_ENABLE_COREINT)
1175 mpic_write(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0),
1176 mpic_read(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0))
1177 | MPIC_GREG_GCONF_COREINT);
1178
1173 if (flags & MPIC_ENABLE_MCK)
1174 mpic_write(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0),
1175 mpic_read(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0))
1176 | MPIC_GREG_GCONF_MCK);
1177
1178 /* Read feature register, calculate num CPUs and, for non-ISU
1179 * MPICs, num sources as well. On ISU MPICs, sources are counted
1180 * as ISUs are added

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1520{
1521 struct mpic *mpic = mpic_primary;
1522
1523 BUG_ON(mpic == NULL);
1524
1525 return mpic_get_one_irq(mpic);
1526}
1527
1179 if (flags & MPIC_ENABLE_MCK)
1180 mpic_write(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0),
1181 mpic_read(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0))
1182 | MPIC_GREG_GCONF_MCK);
1183
1184 /* Read feature register, calculate num CPUs and, for non-ISU
1185 * MPICs, num sources as well. On ISU MPICs, sources are counted
1186 * as ISUs are added

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1526{
1527 struct mpic *mpic = mpic_primary;
1528
1529 BUG_ON(mpic == NULL);
1530
1531 return mpic_get_one_irq(mpic);
1532}
1533
1534unsigned int mpic_get_coreint_irq(void)
1535{
1536#ifdef CONFIG_BOOKE
1537 struct mpic *mpic = mpic_primary;
1538 u32 src;
1539
1540 BUG_ON(mpic == NULL);
1541
1542 src = mfspr(SPRN_EPR);
1543
1544 if (unlikely(src == mpic->spurious_vec)) {
1545 if (mpic->flags & MPIC_SPV_EOI)
1546 mpic_eoi(mpic);
1547 return NO_IRQ;
1548 }
1549 if (unlikely(mpic->protected && test_bit(src, mpic->protected))) {
1550 if (printk_ratelimit())
1551 printk(KERN_WARNING "%s: Got protected source %d !\n",
1552 mpic->name, (int)src);
1553 return NO_IRQ;
1554 }
1555
1556 return irq_linear_revmap(mpic->irqhost, src);
1557#else
1558 return NO_IRQ;
1559#endif
1560}
1561
1528unsigned int mpic_get_mcirq(void)
1529{
1530 struct mpic *mpic = mpic_primary;
1531
1532 BUG_ON(mpic == NULL);
1533
1534 return _mpic_get_one_irq(mpic, MPIC_INFO(CPU_MCACK));
1535}

--- 139 unchanged lines hidden --- 		1562unsigned int mpic_get_mcirq(void)
1563{
1564 struct mpic *mpic = mpic_primary;
1565
1566 BUG_ON(mpic == NULL);
1567
1568 return _mpic_get_one_irq(mpic, MPIC_INFO(CPU_MCACK));
1569}

--- 139 unchanged lines hidden ---