mem.c (eae9eec476d13fad9af6da1f44a054ee02b7b161) | mem.c (c9118e6c37bff9ade90b638207a6e0db676ee6a9) |
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1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * PowerPC version 4 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 5 * 6 * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au) 7 * and Cort Dougan (PReP) (cort@cs.nmt.edu) 8 * Copyright (C) 1996 Paul Mackerras --- 35 unchanged lines hidden (view full) --- 44#include <asm/tlb.h> 45#include <asm/sections.h> 46#include <asm/sparsemem.h> 47#include <asm/vdso.h> 48#include <asm/fixmap.h> 49#include <asm/swiotlb.h> 50#include <asm/rtas.h> 51#include <asm/kasan.h> | 1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * PowerPC version 4 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 5 * 6 * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au) 7 * and Cort Dougan (PReP) (cort@cs.nmt.edu) 8 * Copyright (C) 1996 Paul Mackerras --- 35 unchanged lines hidden (view full) --- 44#include <asm/tlb.h> 45#include <asm/sections.h> 46#include <asm/sparsemem.h> 47#include <asm/vdso.h> 48#include <asm/fixmap.h> 49#include <asm/swiotlb.h> 50#include <asm/rtas.h> 51#include <asm/kasan.h> |
52#include <asm/svm.h> | |
53 54#include <mm/mmu_decl.h> 55 56#ifndef CPU_FTR_COHERENT_ICACHE 57#define CPU_FTR_COHERENT_ICACHE 0 /* XXX for now */ 58#define CPU_FTR_NOEXECUTE 0 59#endif 60 --- 119 unchanged lines hidden (view full) --- 180void __init initmem_init(void) 181{ 182 sparse_init(); 183} 184 185/* mark pages that don't exist as nosave */ 186static int __init mark_nonram_nosave(void) 187{ | 52 53#include <mm/mmu_decl.h> 54 55#ifndef CPU_FTR_COHERENT_ICACHE 56#define CPU_FTR_COHERENT_ICACHE 0 /* XXX for now */ 57#define CPU_FTR_NOEXECUTE 0 58#endif 59 --- 119 unchanged lines hidden (view full) --- 179void __init initmem_init(void) 180{ 181 sparse_init(); 182} 183 184/* mark pages that don't exist as nosave */ 185static int __init mark_nonram_nosave(void) 186{ |
188 struct memblock_region *reg, *prev = NULL; | 187 unsigned long spfn, epfn, prev = 0; 188 int i; |
189 | 189 |
190 for_each_memblock(memory, reg) { 191 if (prev && 192 memblock_region_memory_end_pfn(prev) < memblock_region_memory_base_pfn(reg)) 193 register_nosave_region(memblock_region_memory_end_pfn(prev), 194 memblock_region_memory_base_pfn(reg)); 195 prev = reg; | 190 for_each_mem_pfn_range(i, MAX_NUMNODES, &spfn, &epfn, NULL) { 191 if (prev && prev < spfn) 192 register_nosave_region(prev, spfn); 193 194 prev = epfn; |
196 } | 195 } |
196 |
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197 return 0; 198} 199#else /* CONFIG_NEED_MULTIPLE_NODES */ 200static int __init mark_nonram_nosave(void) 201{ 202 return 0; 203} 204#endif --- 73 unchanged lines hidden (view full) --- 278 /* 279 * Some platforms (e.g. 85xx) limit DMA-able memory way below 280 * 4G. We force memblock to bottom-up mode to ensure that the 281 * memory allocated in swiotlb_init() is DMA-able. 282 * As it's the last memblock allocation, no need to reset it 283 * back to to-down. 284 */ 285 memblock_set_bottom_up(true); | 197 return 0; 198} 199#else /* CONFIG_NEED_MULTIPLE_NODES */ 200static int __init mark_nonram_nosave(void) 201{ 202 return 0; 203} 204#endif --- 73 unchanged lines hidden (view full) --- 278 /* 279 * Some platforms (e.g. 85xx) limit DMA-able memory way below 280 * 4G. We force memblock to bottom-up mode to ensure that the 281 * memory allocated in swiotlb_init() is DMA-able. 282 * As it's the last memblock allocation, no need to reset it 283 * back to to-down. 284 */ 285 memblock_set_bottom_up(true); |
286 if (is_secure_guest()) 287 svm_swiotlb_init(); 288 else 289 swiotlb_init(0); | 286 swiotlb_init(0); |
290#endif 291 292 high_memory = (void *) __va(max_low_pfn * PAGE_SIZE); 293 set_max_mapnr(max_pfn); 294 295 kasan_late_init(); 296 297 memblock_free_all(); --- 341 unchanged lines hidden --- | 287#endif 288 289 high_memory = (void *) __va(max_low_pfn * PAGE_SIZE); 290 set_max_mapnr(max_pfn); 291 292 kasan_late_init(); 293 294 memblock_free_all(); --- 341 unchanged lines hidden --- |