| vector.S (6548698f929814375fa5d62ae1db96959b0418c1) | vector.S (e090aa80321b64c3b793f3b047e31ecf1af9538d) |
|---|---|
| 1#include <asm/processor.h> 2#include <asm/ppc_asm.h> 3#include <asm/reg.h> 4#include <asm/asm-offsets.h> 5#include <asm/cputable.h> 6#include <asm/thread_info.h> 7#include <asm/page.h> 8 --- 44 unchanged lines hidden (view full) --- 53#endif /* CONFIG_SMP */ 54 55 /* Hack: if we get an altivec unavailable trap with VRSAVE 56 * set to all zeros, we assume this is a broken application 57 * that fails to set it properly, and thus we switch it to 58 * all 1's 59 */ 60 mfspr r4,SPRN_VRSAVE | 1#include <asm/processor.h> 2#include <asm/ppc_asm.h> 3#include <asm/reg.h> 4#include <asm/asm-offsets.h> 5#include <asm/cputable.h> 6#include <asm/thread_info.h> 7#include <asm/page.h> 8 --- 44 unchanged lines hidden (view full) --- 53#endif /* CONFIG_SMP */ 54 55 /* Hack: if we get an altivec unavailable trap with VRSAVE 56 * set to all zeros, we assume this is a broken application 57 * that fails to set it properly, and thus we switch it to 58 * all 1's 59 */ 60 mfspr r4,SPRN_VRSAVE |
| 61 cmpdi 0,r4,0 | 61 cmpwi 0,r4,0 |
| 62 bne+ 1f 63 li r4,-1 64 mtspr SPRN_VRSAVE,r4 651: 66 /* enable use of VMX after return */ 67#ifdef CONFIG_PPC32 68 mfspr r5,SPRN_SPRG_THREAD /* current task's THREAD (phys) */ 69 oris r9,r9,MSR_VEC@h --- 337 unchanged lines hidden --- | 62 bne+ 1f 63 li r4,-1 64 mtspr SPRN_VRSAVE,r4 651: 66 /* enable use of VMX after return */ 67#ifdef CONFIG_PPC32 68 mfspr r5,SPRN_SPRG_THREAD /* current task's THREAD (phys) */ 69 oris r9,r9,MSR_VEC@h --- 337 unchanged lines hidden --- |