traps.c (9409d2f9dad2f0679d67dc24d8116dd3e837b035) traps.c (69ea03b56ed2c7189ccd0b5910ad39f3cad1df21)
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
4 * Copyright 2007-2010 Freescale Semiconductor, Inc.
5 *
6 * Modified by Cort Dougan (cort@cs.nmt.edu)
7 * and Paul Mackerras (paulus@samba.org)
8 */

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436nonrecoverable:
437 regs->msr &= ~MSR_RI;
438#endif
439}
440
441void system_reset_exception(struct pt_regs *regs)
442{
443 unsigned long hsrr0, hsrr1;
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
4 * Copyright 2007-2010 Freescale Semiconductor, Inc.
5 *
6 * Modified by Cort Dougan (cort@cs.nmt.edu)
7 * and Paul Mackerras (paulus@samba.org)
8 */

--- 427 unchanged lines hidden (view full) ---

436nonrecoverable:
437 regs->msr &= ~MSR_RI;
438#endif
439}
440
441void system_reset_exception(struct pt_regs *regs)
442{
443 unsigned long hsrr0, hsrr1;
444 bool nested = in_nmi();
445 bool saved_hsrrs = false;
444 bool saved_hsrrs = false;
446 u8 ftrace_enabled = this_cpu_get_ftrace_enabled();
447
445
448 this_cpu_set_ftrace_enabled(0);
446 nmi_enter();
449
450 /*
447
448 /*
451 * Avoid crashes in case of nested NMI exceptions. Recoverability
452 * is determined by RI and in_nmi
453 */
454 if (!nested)
455 nmi_enter();
456
457 /*
458 * System reset can interrupt code where HSRRs are live and MSR[RI]=1.
459 * The system reset interrupt itself may clobber HSRRs (e.g., to call
460 * OPAL), so save them here and restore them before returning.
461 *
462 * Machine checks don't need to save HSRRs, as the real mode handler
463 * is careful to avoid them, and the regular handler is not delivered
464 * as an NMI.
465 */

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508 mdelay(2*MSEC_PER_SEC); /* Wait a little while for others to print */
509 add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE);
510 nmi_panic(regs, "System Reset");
511
512out:
513#ifdef CONFIG_PPC_BOOK3S_64
514 BUG_ON(get_paca()->in_nmi == 0);
515 if (get_paca()->in_nmi > 1)
449 * System reset can interrupt code where HSRRs are live and MSR[RI]=1.
450 * The system reset interrupt itself may clobber HSRRs (e.g., to call
451 * OPAL), so save them here and restore them before returning.
452 *
453 * Machine checks don't need to save HSRRs, as the real mode handler
454 * is careful to avoid them, and the regular handler is not delivered
455 * as an NMI.
456 */

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499 mdelay(2*MSEC_PER_SEC); /* Wait a little while for others to print */
500 add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE);
501 nmi_panic(regs, "System Reset");
502
503out:
504#ifdef CONFIG_PPC_BOOK3S_64
505 BUG_ON(get_paca()->in_nmi == 0);
506 if (get_paca()->in_nmi > 1)
516 die("Unrecoverable nested System Reset", regs, SIGABRT);
507 nmi_panic(regs, "Unrecoverable nested System Reset");
517#endif
518 /* Must die if the interrupt is not recoverable */
519 if (!(regs->msr & MSR_RI))
508#endif
509 /* Must die if the interrupt is not recoverable */
510 if (!(regs->msr & MSR_RI))
520 die("Unrecoverable System Reset", regs, SIGABRT);
511 nmi_panic(regs, "Unrecoverable System Reset");
521
522 if (saved_hsrrs) {
523 mtspr(SPRN_HSRR0, hsrr0);
524 mtspr(SPRN_HSRR1, hsrr1);
525 }
526
512
513 if (saved_hsrrs) {
514 mtspr(SPRN_HSRR0, hsrr0);
515 mtspr(SPRN_HSRR1, hsrr1);
516 }
517
527 if (!nested)
528 nmi_exit();
518 nmi_exit();
529
519
530 this_cpu_set_ftrace_enabled(ftrace_enabled);
531
532 /* What should we do here? We could issue a shutdown or hard reset. */
533}
534
535/*
536 * I/O accesses can cause machine checks on powermacs.
537 * Check if the NIP corresponds to the address of a sync
538 * instruction for which there is an entry in the exception
539 * table.

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583#ifdef CONFIG_PPC_ADV_DEBUG_REGS
584/* On 4xx, the reason for the machine check or program exception
585 is in the ESR. */
586#define get_reason(regs) ((regs)->dsisr)
587#define REASON_FP ESR_FP
588#define REASON_ILLEGAL (ESR_PIL | ESR_PUO)
589#define REASON_PRIVILEGED ESR_PPR
590#define REASON_TRAP ESR_PTR
520 /* What should we do here? We could issue a shutdown or hard reset. */
521}
522
523/*
524 * I/O accesses can cause machine checks on powermacs.
525 * Check if the NIP corresponds to the address of a sync
526 * instruction for which there is an entry in the exception
527 * table.

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571#ifdef CONFIG_PPC_ADV_DEBUG_REGS
572/* On 4xx, the reason for the machine check or program exception
573 is in the ESR. */
574#define get_reason(regs) ((regs)->dsisr)
575#define REASON_FP ESR_FP
576#define REASON_ILLEGAL (ESR_PIL | ESR_PUO)
577#define REASON_PRIVILEGED ESR_PPR
578#define REASON_TRAP ESR_PTR
591#define REASON_PREFIXED 0
592#define REASON_BOUNDARY 0
593
594/* single-step stuff */
595#define single_stepping(regs) (current->thread.debug.dbcr0 & DBCR0_IC)
596#define clear_single_step(regs) (current->thread.debug.dbcr0 &= ~DBCR0_IC)
597#define clear_br_trace(regs) do {} while(0)
598#else
599/* On non-4xx, the reason for the machine check or program
600 exception is in the MSR. */
601#define get_reason(regs) ((regs)->msr)
602#define REASON_TM SRR1_PROGTM
603#define REASON_FP SRR1_PROGFPE
604#define REASON_ILLEGAL SRR1_PROGILL
605#define REASON_PRIVILEGED SRR1_PROGPRIV
606#define REASON_TRAP SRR1_PROGTRAP
579
580/* single-step stuff */
581#define single_stepping(regs) (current->thread.debug.dbcr0 & DBCR0_IC)
582#define clear_single_step(regs) (current->thread.debug.dbcr0 &= ~DBCR0_IC)
583#define clear_br_trace(regs) do {} while(0)
584#else
585/* On non-4xx, the reason for the machine check or program
586 exception is in the MSR. */
587#define get_reason(regs) ((regs)->msr)
588#define REASON_TM SRR1_PROGTM
589#define REASON_FP SRR1_PROGFPE
590#define REASON_ILLEGAL SRR1_PROGILL
591#define REASON_PRIVILEGED SRR1_PROGPRIV
592#define REASON_TRAP SRR1_PROGTRAP
607#define REASON_PREFIXED SRR1_PREFIXED
608#define REASON_BOUNDARY SRR1_BOUNDARY
609
610#define single_stepping(regs) ((regs)->msr & MSR_SE)
611#define clear_single_step(regs) ((regs)->msr &= ~MSR_SE)
612#define clear_br_trace(regs) ((regs)->msr &= ~MSR_BE)
613#endif
614
593
594#define single_stepping(regs) ((regs)->msr & MSR_SE)
595#define clear_single_step(regs) ((regs)->msr &= ~MSR_SE)
596#define clear_br_trace(regs) ((regs)->msr &= ~MSR_BE)
597#endif
598
615#define inst_length(reason) (((reason) & REASON_PREFIXED) ? 8 : 4)
616
617#if defined(CONFIG_E500)
618int machine_check_e500mc(struct pt_regs *regs)
619{
620 unsigned long mcsr = mfspr(SPRN_MCSR);
621 unsigned long pvr = mfspr(SPRN_PVR);
622 unsigned long reason = mcsr;
623 int recoverable = 1;
624

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829 }
830 return 0;
831}
832#endif /* everything else */
833
834void machine_check_exception(struct pt_regs *regs)
835{
836 int recover = 0;
599#if defined(CONFIG_E500)
600int machine_check_e500mc(struct pt_regs *regs)
601{
602 unsigned long mcsr = mfspr(SPRN_MCSR);
603 unsigned long pvr = mfspr(SPRN_PVR);
604 unsigned long reason = mcsr;
605 int recoverable = 1;
606

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811 }
812 return 0;
813}
814#endif /* everything else */
815
816void machine_check_exception(struct pt_regs *regs)
817{
818 int recover = 0;
837 bool nested;
838
819
839 /*
840 * BOOK3S_64 does not call this handler as a non-maskable interrupt
841 * (it uses its own early real-mode handler to handle the MCE proper
842 * and then raises irq_work to call this handler when interrupts are
843 * enabled). Set nested = true for this case, which just makes it avoid
844 * the nmi_enter/exit.
845 */
846 if (IS_ENABLED(CONFIG_PPC_BOOK3S_64) || in_nmi())
847 nested = true;
848 else
849 nested = false;
850 if (!nested)
851 nmi_enter();
820 nmi_enter();
852
853 __this_cpu_inc(irq_stat.mce_exceptions);
854
855 add_taint(TAINT_MACHINE_CHECK, LOCKDEP_NOW_UNRELIABLE);
856
857 /* See if any machine dependent calls. In theory, we would want
858 * to call the CPU first, and call the ppc_md. one if the CPU
859 * one returns a positive number. However there is existing code

--- 9 unchanged lines hidden (view full) ---

869 goto bail;
870
871 if (debugger_fault_handler(regs))
872 goto bail;
873
874 if (check_io_access(regs))
875 goto bail;
876
821
822 __this_cpu_inc(irq_stat.mce_exceptions);
823
824 add_taint(TAINT_MACHINE_CHECK, LOCKDEP_NOW_UNRELIABLE);
825
826 /* See if any machine dependent calls. In theory, we would want
827 * to call the CPU first, and call the ppc_md. one if the CPU
828 * one returns a positive number. However there is existing code

--- 9 unchanged lines hidden (view full) ---

838 goto bail;
839
840 if (debugger_fault_handler(regs))
841 goto bail;
842
843 if (check_io_access(regs))
844 goto bail;
845
877 if (!nested)
878 nmi_exit();
846 nmi_exit();
879
880 die("Machine check", regs, SIGBUS);
881
882 /* Must die if the interrupt is not recoverable */
883 if (!(regs->msr & MSR_RI))
847
848 die("Machine check", regs, SIGBUS);
849
850 /* Must die if the interrupt is not recoverable */
851 if (!(regs->msr & MSR_RI))
884 die("Unrecoverable Machine check", regs, SIGBUS);
852 nmi_panic(regs, "Unrecoverable Machine check");
885
886 return;
887
888bail:
853
854 return;
855
856bail:
889 if (!nested)
890 nmi_exit();
857 nmi_exit();
891}
892
893void SMIException(struct pt_regs *regs)
894{
895 die("System Management Interrupt", regs, SIGABRT);
896}
897
898#ifdef CONFIG_VSX

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1611 program_check_exception(regs);
1612}
1613NOKPROBE_SYMBOL(emulation_assist_interrupt);
1614
1615void alignment_exception(struct pt_regs *regs)
1616{
1617 enum ctx_state prev_state = exception_enter();
1618 int sig, code, fixed = 0;
858}
859
860void SMIException(struct pt_regs *regs)
861{
862 die("System Management Interrupt", regs, SIGABRT);
863}
864
865#ifdef CONFIG_VSX

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1578 program_check_exception(regs);
1579}
1580NOKPROBE_SYMBOL(emulation_assist_interrupt);
1581
1582void alignment_exception(struct pt_regs *regs)
1583{
1584 enum ctx_state prev_state = exception_enter();
1585 int sig, code, fixed = 0;
1619 unsigned long reason;
1620
1621 /* We restore the interrupt state now */
1622 if (!arch_irq_disabled_regs(regs))
1623 local_irq_enable();
1624
1586
1587 /* We restore the interrupt state now */
1588 if (!arch_irq_disabled_regs(regs))
1589 local_irq_enable();
1590
1625 reason = get_reason(regs);
1626
1627 if (reason & REASON_BOUNDARY) {
1628 sig = SIGBUS;
1629 code = BUS_ADRALN;
1630 goto bad;
1631 }
1632
1633 if (tm_abort_check(regs, TM_CAUSE_ALIGNMENT | TM_CAUSE_PERSISTENT))
1634 goto bail;
1635
1636 /* we don't implement logging of alignment exceptions */
1637 if (!(current->thread.align_ctl & PR_UNALIGN_SIGBUS))
1638 fixed = fix_alignment(regs);
1639
1640 if (fixed == 1) {
1591 if (tm_abort_check(regs, TM_CAUSE_ALIGNMENT | TM_CAUSE_PERSISTENT))
1592 goto bail;
1593
1594 /* we don't implement logging of alignment exceptions */
1595 if (!(current->thread.align_ctl & PR_UNALIGN_SIGBUS))
1596 fixed = fix_alignment(regs);
1597
1598 if (fixed == 1) {
1641 /* skip over emulated instruction */
1642 regs->nip += inst_length(reason);
1599 regs->nip += 4; /* skip over emulated instruction */
1643 emulate_single_step(regs);
1644 goto bail;
1645 }
1646
1647 /* Operand address was bad */
1648 if (fixed == -EFAULT) {
1649 sig = SIGSEGV;
1650 code = SEGV_ACCERR;
1651 } else {
1652 sig = SIGBUS;
1653 code = BUS_ADRALN;
1654 }
1600 emulate_single_step(regs);
1601 goto bail;
1602 }
1603
1604 /* Operand address was bad */
1605 if (fixed == -EFAULT) {
1606 sig = SIGSEGV;
1607 code = SEGV_ACCERR;
1608 } else {
1609 sig = SIGBUS;
1610 code = BUS_ADRALN;
1611 }
1655bad:
1656 if (user_mode(regs))
1657 _exception(sig, regs, code, regs->dar);
1658 else
1659 bad_page_fault(regs, regs->dar, sig);
1660
1661bail:
1662 exception_exit(prev_state);
1663}

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1749 [FSCR_DSCR_LG] = "DSCR",
1750 [FSCR_PM_LG] = "PMU SPRs",
1751 [FSCR_BHRB_LG] = "BHRB",
1752 [FSCR_TM_LG] = "TM",
1753 [FSCR_EBB_LG] = "EBB",
1754 [FSCR_TAR_LG] = "TAR",
1755 [FSCR_MSGP_LG] = "MSGP",
1756 [FSCR_SCV_LG] = "SCV",
1612 if (user_mode(regs))
1613 _exception(sig, regs, code, regs->dar);
1614 else
1615 bad_page_fault(regs, regs->dar, sig);
1616
1617bail:
1618 exception_exit(prev_state);
1619}

--- 85 unchanged lines hidden (view full) ---

1705 [FSCR_DSCR_LG] = "DSCR",
1706 [FSCR_PM_LG] = "PMU SPRs",
1707 [FSCR_BHRB_LG] = "BHRB",
1708 [FSCR_TM_LG] = "TM",
1709 [FSCR_EBB_LG] = "EBB",
1710 [FSCR_TAR_LG] = "TAR",
1711 [FSCR_MSGP_LG] = "MSGP",
1712 [FSCR_SCV_LG] = "SCV",
1757 [FSCR_PREFIX_LG] = "PREFIX",
1758 };
1759 char *facility = "unknown";
1760 u64 value;
1761 u32 instword, rd;
1762 u8 status;
1763 bool hv;
1764
1765 hv = (TRAP(regs) == 0xf80);

--- 569 unchanged lines hidden --- 		1713 };
1714 char *facility = "unknown";
1715 u64 value;
1716 u32 instword, rd;
1717 u8 status;
1718 bool hv;
1719
1720 hv = (TRAP(regs) == 0xf80);

--- 569 unchanged lines hidden ---