pci-common.c (1fd0f52583a85b21a394201b007bc1ee104b235d) pci-common.c (b0494bc8ee449f0534afa92a51e2e3bb27bab69b)
1/*
2 * Contains common pci routines for ALL ppc platform
3 * (based on pci_32.c and pci_64.c)
4 *
5 * Port for PPC64 David Engebretsen, IBM Corp.
6 * Contains common pci routines for ppc64 platform, pSeries and iSeries brands.
7 *
8 * Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM

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33#include <asm/io.h>
34#include <asm/prom.h>
35#include <asm/pci-bridge.h>
36#include <asm/byteorder.h>
37#include <asm/machdep.h>
38#include <asm/ppc-pci.h>
39#include <asm/firmware.h>
40
1/*
2 * Contains common pci routines for ALL ppc platform
3 * (based on pci_32.c and pci_64.c)
4 *
5 * Port for PPC64 David Engebretsen, IBM Corp.
6 * Contains common pci routines for ppc64 platform, pSeries and iSeries brands.
7 *
8 * Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM

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33#include <asm/io.h>
34#include <asm/prom.h>
35#include <asm/pci-bridge.h>
36#include <asm/byteorder.h>
37#include <asm/machdep.h>
38#include <asm/ppc-pci.h>
39#include <asm/firmware.h>
40
41#ifdef DEBUG
42#include <asm/udbg.h>
43#define DBG(fmt...) printk(fmt)
44#else
45#define DBG(fmt...)
46#endif
47
48static DEFINE_SPINLOCK(hose_spinlock);
49
50/* XXX kill that some day ... */
51static int global_phb_number; /* Global phb counter */
52
53/* ISA Memory physical address */
54resource_size_t isa_mem_base;
55

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210}
211
212void __devinit pcibios_setup_new_device(struct pci_dev *dev)
213{
214 struct dev_archdata *sd = &dev->dev.archdata;
215
216 sd->of_node = pci_device_to_OF_node(dev);
217
41static DEFINE_SPINLOCK(hose_spinlock);
42
43/* XXX kill that some day ... */
44static int global_phb_number; /* Global phb counter */
45
46/* ISA Memory physical address */
47resource_size_t isa_mem_base;
48

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203}
204
205void __devinit pcibios_setup_new_device(struct pci_dev *dev)
206{
207 struct dev_archdata *sd = &dev->dev.archdata;
208
209 sd->of_node = pci_device_to_OF_node(dev);
210
218 DBG("PCI: device %s OF node: %s\n", pci_name(dev),
219 sd->of_node ? sd->of_node->full_name : "<none>");
211 pr_debug("PCI: device %s OF node: %s\n", pci_name(dev),
212 sd->of_node ? sd->of_node->full_name : "<none>");
220
221 sd->dma_ops = pci_dma_ops;
222#ifdef CONFIG_PPC32
223 sd->dma_data = (void *)PCI_DRAM_OFFSET;
224#endif
225 set_dev_node(&dev->dev, pcibus_to_node(dev->bus));
226
227 if (ppc_md.pci_dma_dev_setup)

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248 * In the long run, we will hopefully fix the generated device-tree
249 * instead.
250 */
251#ifdef CONFIG_PPC_ISERIES
252 if (firmware_has_feature(FW_FEATURE_ISERIES))
253 return -1;
254#endif
255
213
214 sd->dma_ops = pci_dma_ops;
215#ifdef CONFIG_PPC32
216 sd->dma_data = (void *)PCI_DRAM_OFFSET;
217#endif
218 set_dev_node(&dev->dev, pcibus_to_node(dev->bus));
219
220 if (ppc_md.pci_dma_dev_setup)

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241 * In the long run, we will hopefully fix the generated device-tree
242 * instead.
243 */
244#ifdef CONFIG_PPC_ISERIES
245 if (firmware_has_feature(FW_FEATURE_ISERIES))
246 return -1;
247#endif
248
256 DBG("Try to map irq for %s...\n", pci_name(pci_dev));
249 pr_debug("PCI: Try to map irq for %s...\n", pci_name(pci_dev));
257
258#ifdef DEBUG
259 memset(&oirq, 0xff, sizeof(oirq));
260#endif
261 /* Try to get a mapping from the device-tree */
262 if (of_irq_map_pci(pci_dev, &oirq)) {
263 u8 line, pin;
264

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272 if (pci_read_config_byte(pci_dev, PCI_INTERRUPT_PIN, &pin))
273 return -1;
274 if (pin == 0)
275 return -1;
276 if (pci_read_config_byte(pci_dev, PCI_INTERRUPT_LINE, &line) ||
277 line == 0xff || line == 0) {
278 return -1;
279 }
250
251#ifdef DEBUG
252 memset(&oirq, 0xff, sizeof(oirq));
253#endif
254 /* Try to get a mapping from the device-tree */
255 if (of_irq_map_pci(pci_dev, &oirq)) {
256 u8 line, pin;
257

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265 if (pci_read_config_byte(pci_dev, PCI_INTERRUPT_PIN, &pin))
266 return -1;
267 if (pin == 0)
268 return -1;
269 if (pci_read_config_byte(pci_dev, PCI_INTERRUPT_LINE, &line) ||
270 line == 0xff || line == 0) {
271 return -1;
272 }
280 DBG(" -> no map ! Using line %d (pin %d) from PCI config\n",
281 line, pin);
273 pr_debug(" No map ! Using line %d (pin %d) from PCI config\n",
274 line, pin);
282
283 virq = irq_create_mapping(NULL, line);
284 if (virq != NO_IRQ)
285 set_irq_type(virq, IRQ_TYPE_LEVEL_LOW);
286 } else {
275
276 virq = irq_create_mapping(NULL, line);
277 if (virq != NO_IRQ)
278 set_irq_type(virq, IRQ_TYPE_LEVEL_LOW);
279 } else {
287 DBG(" -> got one, spec %d cells (0x%08x 0x%08x...) on %s\n",
288 oirq.size, oirq.specifier[0], oirq.specifier[1],
280 pr_debug(" Got one, spec %d cells (0x%08x 0x%08x...) on %s\n",
281 oirq.size, oirq.specifier[0], oirq.specifier[1],
289 oirq.controller->full_name);
290
291 virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
292 oirq.size);
293 }
294 if(virq == NO_IRQ) {
282 oirq.controller->full_name);
283
284 virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
285 oirq.size);
286 }
287 if(virq == NO_IRQ) {
295 DBG(" -> failed to map !\n");
288 pr_debug(" Failed to map !\n");
296 return -1;
297 }
298
289 return -1;
290 }
291
299 DBG(" -> mapped to linux irq %d\n", virq);
292 pr_debug(" Mapped to linux irq %d\n", virq);
300
301 pci_dev->irq = virq;
302
303 return 0;
304}
305EXPORT_SYMBOL(pci_read_irq_line);
306
307/*

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447 break;
448 }
449 if (found) {
450 if (found->flags & IORESOURCE_PREFETCH)
451 prot &= ~_PAGE_GUARDED;
452 pci_dev_put(pdev);
453 }
454
293
294 pci_dev->irq = virq;
295
296 return 0;
297}
298EXPORT_SYMBOL(pci_read_irq_line);
299
300/*

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440 break;
441 }
442 if (found) {
443 if (found->flags & IORESOURCE_PREFETCH)
444 prot &= ~_PAGE_GUARDED;
445 pci_dev_put(pdev);
446 }
447
455 DBG("non-PCI map for %llx, prot: %lx\n",
456 (unsigned long long)offset, prot);
448 pr_debug("PCI: Non-PCI map for %llx, prot: %lx\n",
449 (unsigned long long)offset, prot);
457
458 return __pgprot(prot);
459}
460
461
462/*
463 * Perform the actual remap of the pages for a PCI device mapping, as
464 * appropriate for this architecture. The region in the process to map

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1191 return -1; /* didn't find any conflicting entries? */
1192 res->parent = parent;
1193 res->child = *firstpp;
1194 res->sibling = *pp;
1195 *firstpp = res;
1196 *pp = NULL;
1197 for (p = res->child; p != NULL; p = p->sibling) {
1198 p->parent = res;
450
451 return __pgprot(prot);
452}
453
454
455/*
456 * Perform the actual remap of the pages for a PCI device mapping, as
457 * appropriate for this architecture. The region in the process to map

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1184 return -1; /* didn't find any conflicting entries? */
1185 res->parent = parent;
1186 res->child = *firstpp;
1187 res->sibling = *pp;
1188 *firstpp = res;
1189 *pp = NULL;
1190 for (p = res->child; p != NULL; p = p->sibling) {
1191 p->parent = res;
1199 DBG(KERN_INFO "PCI: reparented %s [%llx..%llx] under %s\n",
1200 p->name,
1201 (unsigned long long)p->start,
1202 (unsigned long long)p->end, res->name);
1192 pr_debug("PCI: Reparented %s [%llx..%llx] under %s\n",
1193 p->name,
1194 (unsigned long long)p->start,
1195 (unsigned long long)p->end, res->name);
1203 }
1204 return 0;
1205}
1206
1207/*
1208 * Handle resources of PCI devices. If the world were perfect, we could
1209 * just allocate all the resource regions and do nothing more. It isn't.
1210 * On the other hand, we cannot just re-allocate all devices, as it would

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1264 /* this happens when the generic PCI
1265 * code (wrongly) decides that this
1266 * bridge is transparent -- paulus
1267 */
1268 continue;
1269 }
1270 }
1271
1196 }
1197 return 0;
1198}
1199
1200/*
1201 * Handle resources of PCI devices. If the world were perfect, we could
1202 * just allocate all the resource regions and do nothing more. It isn't.
1203 * On the other hand, we cannot just re-allocate all devices, as it would

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1257 /* this happens when the generic PCI
1258 * code (wrongly) decides that this
1259 * bridge is transparent -- paulus
1260 */
1261 continue;
1262 }
1263 }
1264
1272 DBG("PCI: %s (bus %d) bridge rsrc %d: %016llx-%016llx "
1273 "[0x%x], parent %p (%s)\n",
1274 bus->self ? pci_name(bus->self) : "PHB",
1275 bus->number, i,
1276 (unsigned long long)res->start,
1277 (unsigned long long)res->end,
1278 (unsigned int)res->flags,
1279 pr, (pr && pr->name) ? pr->name : "nil");
1265 pr_debug("PCI: %s (bus %d) bridge rsrc %d: %016llx-%016llx "
1266 "[0x%x], parent %p (%s)\n",
1267 bus->self ? pci_name(bus->self) : "PHB",
1268 bus->number, i,
1269 (unsigned long long)res->start,
1270 (unsigned long long)res->end,
1271 (unsigned int)res->flags,
1272 pr, (pr && pr->name) ? pr->name : "nil");
1280
1281 if (pr && !(pr->flags & IORESOURCE_UNSET)) {
1282 if (request_resource(pr, res) == 0)
1283 continue;
1284 /*
1285 * Must be a conflict with an existing entry.
1286 * Move that entry (or entries) under the
1287 * bridge resource and try again.

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1298 list_for_each_entry(b, &bus->children, node)
1299 pcibios_allocate_bus_resources(b);
1300}
1301
1302static inline void __devinit alloc_resource(struct pci_dev *dev, int idx)
1303{
1304 struct resource *pr, *r = &dev->resource[idx];
1305
1273
1274 if (pr && !(pr->flags & IORESOURCE_UNSET)) {
1275 if (request_resource(pr, res) == 0)
1276 continue;
1277 /*
1278 * Must be a conflict with an existing entry.
1279 * Move that entry (or entries) under the
1280 * bridge resource and try again.

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1291 list_for_each_entry(b, &bus->children, node)
1292 pcibios_allocate_bus_resources(b);
1293}
1294
1295static inline void __devinit alloc_resource(struct pci_dev *dev, int idx)
1296{
1297 struct resource *pr, *r = &dev->resource[idx];
1298
1306 DBG("PCI: Allocating %s: Resource %d: %016llx..%016llx [%x]\n",
1307 pci_name(dev), idx,
1308 (unsigned long long)r->start,
1309 (unsigned long long)r->end,
1310 (unsigned int)r->flags);
1299 pr_debug("PCI: Allocating %s: Resource %d: %016llx..%016llx [%x]\n",
1300 pci_name(dev), idx,
1301 (unsigned long long)r->start,
1302 (unsigned long long)r->end,
1303 (unsigned int)r->flags);
1311
1312 pr = pci_find_parent_resource(dev, r);
1313 if (!pr || (pr->flags & IORESOURCE_UNSET) ||
1314 request_resource(pr, r) < 0) {
1315 printk(KERN_WARNING "PCI: Cannot allocate resource region %d"
1316 " of device %s, will remap\n", idx, pci_name(dev));
1317 if (pr)
1304
1305 pr = pci_find_parent_resource(dev, r);
1306 if (!pr || (pr->flags & IORESOURCE_UNSET) ||
1307 request_resource(pr, r) < 0) {
1308 printk(KERN_WARNING "PCI: Cannot allocate resource region %d"
1309 " of device %s, will remap\n", idx, pci_name(dev));
1310 if (pr)
1318 DBG("PCI: parent is %p: %016llx-%016llx [%x]\n", pr,
1319 (unsigned long long)pr->start,
1320 (unsigned long long)pr->end,
1321 (unsigned int)pr->flags);
1311 pr_debug("PCI: parent is %p: %016llx-%016llx [%x]\n",
1312 pr,
1313 (unsigned long long)pr->start,
1314 (unsigned long long)pr->end,
1315 (unsigned int)pr->flags);
1322 /* We'll assign a new address later */
1323 r->flags |= IORESOURCE_UNSET;
1324 r->end -= r->start;
1325 r->start = 0;
1326 }
1327}
1328
1329static void __init pcibios_allocate_resources(int pass)

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1351 if (pass)
1352 continue;
1353 r = &dev->resource[PCI_ROM_RESOURCE];
1354 if (r->flags & IORESOURCE_ROM_ENABLE) {
1355 /* Turn the ROM off, leave the resource region,
1356 * but keep it unregistered.
1357 */
1358 u32 reg;
1316 /* We'll assign a new address later */
1317 r->flags |= IORESOURCE_UNSET;
1318 r->end -= r->start;
1319 r->start = 0;
1320 }
1321}
1322
1323static void __init pcibios_allocate_resources(int pass)

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1345 if (pass)
1346 continue;
1347 r = &dev->resource[PCI_ROM_RESOURCE];
1348 if (r->flags & IORESOURCE_ROM_ENABLE) {
1349 /* Turn the ROM off, leave the resource region,
1350 * but keep it unregistered.
1351 */
1352 u32 reg;
1359 DBG("PCI: Switching off ROM of %s\n", pci_name(dev));
1353 pr_debug("PCI: Switching off ROM of %s\n",
1354 pci_name(dev));
1360 r->flags &= ~IORESOURCE_ROM_ENABLE;
1361 pci_read_config_dword(dev, dev->rom_base_reg, &reg);
1362 pci_write_config_dword(dev, dev->rom_base_reg,
1363 reg & ~PCI_ROM_ADDRESS_ENABLE);
1364 }
1365 }
1366}
1367

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1376 pcibios_allocate_bus_resources(b);
1377
1378 if (!(ppc_pci_flags & PPC_PCI_REASSIGN_ALL_RSRC)) {
1379 pcibios_allocate_resources(0);
1380 pcibios_allocate_resources(1);
1381 }
1382
1383 if (!(ppc_pci_flags & PPC_PCI_PROBE_ONLY)) {
1355 r->flags &= ~IORESOURCE_ROM_ENABLE;
1356 pci_read_config_dword(dev, dev->rom_base_reg, &reg);
1357 pci_write_config_dword(dev, dev->rom_base_reg,
1358 reg & ~PCI_ROM_ADDRESS_ENABLE);
1359 }
1360 }
1361}
1362

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1371 pcibios_allocate_bus_resources(b);
1372
1373 if (!(ppc_pci_flags & PPC_PCI_REASSIGN_ALL_RSRC)) {
1374 pcibios_allocate_resources(0);
1375 pcibios_allocate_resources(1);
1376 }
1377
1378 if (!(ppc_pci_flags & PPC_PCI_PROBE_ONLY)) {
1384 DBG("PCI: Assigning unassigned resouces...\n");
1379 pr_debug("PCI: Assigning unassigned resouces...\n");
1385 pci_assign_unassigned_resources();
1386 }
1387
1388 /* Call machine dependent fixup */
1389 if (ppc_md.pcibios_fixup)
1390 ppc_md.pcibios_fixup();
1391}
1392

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1381 }
1382
1383 /* Call machine dependent fixup */
1384 if (ppc_md.pcibios_fixup)
1385 ppc_md.pcibios_fixup();
1386}
1387

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